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Proceedings Paper

High-speed readout CCDs
Author(s): K. Ball; D.J. Burt; Graham W. Smith
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Paper Abstract

Limitations of standard three-phase frame transfer CCDs in high-speed operation are discussed with particular attention given to parallel and serial transfer, and the output amplifier. It is noted that in most CCD designs the greatest limitation on high-speed performance occurs in a serial register. At very high clock frequencies (greater than 30 MHz) actual generation and transmission of the necessary pulses can become the dominant restriction. Multiple output registers make it possible to obtain much higher readout frequencies. Design of a high-speed device capable of being fully readout in less than 2 mS is presented.

Paper Details

Date Published: 1 April 1991
PDF: 12 pages
Proc. SPIE 1358, 19th Intl Congress on High-Speed Photography and Photonics, (1 April 1991); doi: 10.1117/12.23945
Show Author Affiliations
K. Ball, EEV Ltd. (United Kingdom)
D.J. Burt, GEC Hirst Research Ctr. (United Kingdom)
Graham W. Smith, AWE plc (United Kingdom)

Published in SPIE Proceedings Vol. 1358:
19th Intl Congress on High-Speed Photography and Photonics
Peter W. W. Fuller, Editor(s)

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