Share Email Print
cover

Proceedings Paper

A third-order silicon racetrack add-drop filter with a moderate feature size
Author(s): Ying Wang; Xin Zhou ; Qian Chen; Yue Shao; Xiangning Chen; Qingzhong Huang; Wei Jiang
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

In this work, we design and fabricate a highly compact third-order racetrack add-drop filter consisting of silicon waveguides with modified widths on a silicon-on-insulator (SOI) wafer. Compared to the previous approach that requires an exceedingly narrow coupling gap less than 100nm, we propose a new approach that enlarges the minimum feature size of the whole device to be 300 nm to reduce the process requirement. The three-dimensional finite-difference time-domain (3D-FDTD) method is used for simulation. Experiment results show good agreement with simulation results in property. In the experiment, the filter shows a nearly box-like channel dropping response, which has a large flat 3-dB bandwidth (~3 nm), relatively large FSR (~13.3 nm) and out-of-band rejection larger than 14 dB at the drop port with a footprint of 0.0006 mm2 . The device is small and simple enough to have a wide range of applications in large scale on-chip photonic integration circuits.

Paper Details

Date Published: 12 January 2018
PDF: 7 pages
Proc. SPIE 10622, 2017 International Conference on Optical Instruments and Technology: Micro/Nano Photonics: Materials and Devices, 106220F (12 January 2018); doi: 10.1117/12.2295081
Show Author Affiliations
Ying Wang, Nanjing Univ. (China)
Xin Zhou , Nanjing Univ. (China)
Qian Chen, Nanjing Univ. (China)
Yue Shao, Nanjing Univ. (China)
Xiangning Chen, Nanjing Univ. (China)
Qingzhong Huang, Huazhong Univ. of Science and Technology (China)
Wei Jiang, Nanjing Univ. (China)


Published in SPIE Proceedings Vol. 10622:
2017 International Conference on Optical Instruments and Technology: Micro/Nano Photonics: Materials and Devices
Baojun Li; Xingjun Wang; Ya Sha Yi; Liquan Dong, Editor(s)

© SPIE. Terms of Use
Back to Top