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Proceedings Paper • Open Access

Smart integrated microsystems: the energy efficiency challenge (Conference Presentation)
Author(s): Luca Benini

Paper Abstract

The "internet of everything" envisions trillions of connected objects loaded with high-bandwidth sensors requiring massive amounts of local signal processing, fusion, pattern extraction and classification. From the computational viewpoint, the challenge is formidable and can be addressed only by pushing computing fabrics toward massive parallelism and brain-like energy efficiency levels. CMOS technology can still take us a long way toward this goal, but technology scaling is losing steam. Energy efficiency improvement will increasingly hinge on architecture, circuits, design techniques such as heterogeneous 3D integration, mixed-signal preprocessing, event-based approximate computing and non-Von-Neumann architectures for scalable acceleration.

Paper Details

Date Published: 16 June 2017
PDF: 1 pages
Proc. SPIE 10248, Nanotechnology VIII, 1024802 (16 June 2017); doi: 10.1117/12.2268453
Show Author Affiliations
Luca Benini, Univ. degli Studi di Bologna (Italy)

Published in SPIE Proceedings Vol. 10248:
Nanotechnology VIII
Ion M. Tiginyanu, Editor(s)

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