Proceedings Paper
Application of triple modular redundancy for soft error mitigation in 65-28 nm CMOS VLSI| Format | Member Price | Non-Member Price |
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Paper Abstract
We present a reasonable application of triple modular redundancy as an effective method of multiple soft error mitigation in 65-28 nm CMOS VLSI.
Paper Details
Date Published: 30 December 2016
PDF: 6 pages
Proc. SPIE 10224, International Conference on Micro- and Nano-Electronics 2016, 1022417 (30 December 2016); doi: 10.1117/12.2267143
Published in SPIE Proceedings Vol. 10224:
International Conference on Micro- and Nano-Electronics 2016
Vladimir F. Lukichev; Konstantin V. Rudenko, Editor(s)
PDF: 6 pages
Proc. SPIE 10224, International Conference on Micro- and Nano-Electronics 2016, 1022417 (30 December 2016); doi: 10.1117/12.2267143
Show Author Affiliations
A. P. Skorobogatov, Scientific Research Institute for System Analysis (Russian Federation)
Published in SPIE Proceedings Vol. 10224:
International Conference on Micro- and Nano-Electronics 2016
Vladimir F. Lukichev; Konstantin V. Rudenko, Editor(s)
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