This paper reports a low area, low power, integer-based digital processor for the calculation of phase synchronization between two neural signals. The processor calculates the phase-frequency content of a signal by identifying the specific time periods associated with two consecutive minima. The simplicity of this phase-frequency content identifier allows for the digital processor to utilize only basic digital blocks, such as registers, counters, adders and subtractors, without incorporating any complex multiplication and or division algorithms. In fact, the processor, fabricated in a 0.18μm CMOS process, only occupies an area of 0.0625μm² and consumes 12.5nW from a 1.2V supply voltage when operated at 128kHz. These low-area, low-power features make the proposed processor a valuable computing element in closed loop neural prosthesis for the treatment of neural diseases, such as epilepsy, or for extracting functional connectivity maps between different recording sites in the brain.

Date Published: 30 May 2017
PDF: 10 pages
Proc. SPIE 10247, Bio-MEMS and Medical Microdevices III, 1024709 (30 May 2017); doi: 10.1117/12.2267003

Published in SPIE Proceedings Vol. 10247:
Bio-MEMS and Medical Microdevices III
Sander van den Driesche; Ioanna Giouroudi; Manuel Delgado-Restituto, Editor(s)