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Proceedings Paper

Gate tie-down construct in the 22FDX technology: a silicon-based method for layout optimization
Author(s): B. Ramadout; D. Wehella-Gamage; T. Staiger; H.-P. Moll; T.-Guha Neogi
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Paper Abstract

In order to allow competitive and low-cost designs in the 22nm FD-SOI technology 22FDX™, novel Middle-of-Line (MOL) constructs have been specifically enabled. The Gate Tie-Down (or “continuous RX”) construct allows an optimal device performance without loss of area. A method for a silicon-based evaluation and optimization of the Gate Tie-Down construct is presented here. We discuss the main design-process failure modes, their severity and the risk mitigation options. A full-factorial Design of Experiment used for the construct validation is presented and analyzed. Two critical failure modes are isolated and discussed. As a final step, the optimized design is validated over a much larger number of occurrences, showing a robust 4-sigma manufacturing design margin.

Paper Details

Date Published: 28 March 2017
PDF: 7 pages
Proc. SPIE 10148, Design-Process-Technology Co-optimization for Manufacturability XI, 1014812 (28 March 2017); doi: 10.1117/12.2258453
Show Author Affiliations
B. Ramadout, GLOBALFOUNDRIES Dresden Module One LLC & Co. KG (Germany)
D. Wehella-Gamage, GLOBALFOUNDRIES Inc. (United States)
T. Staiger, GLOBALFOUNDRIES Dresden Module One LLC & Co. KG (Germany)
H.-P. Moll, GLOBALFOUNDRIES Dresden Module One LLC & Co. KG (Germany)
T.-Guha Neogi, GLOBALFOUNDRIES Inc. (United States)

Published in SPIE Proceedings Vol. 10148:
Design-Process-Technology Co-optimization for Manufacturability XI
Luigi Capodieci; Jason P. Cain, Editor(s)

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