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An OCD perspective of line edge and line width roughness metrology
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Paper Abstract

Metrology of nanoscale patterns poses multiple challenges that range from measurement noise, metrology errors, probe size etc. Optical Metrology has gained a lot of significance in the semiconductor industry due to its fast turn around and reliable accuracy, particularly to monitor in-line process variations. Apart from monitoring critical dimension, thickness of films, there are multiple parameters that can be extracted from Optical Metrology models3. Sidewall angles, material compositions etc., can also be modeled to acceptable accuracy. Line edge and Line Width roughness are much sought of metrology following critical dimension and its uniformity, although there has not been much development in them with optical metrology. Scanning Electron Microscopy is still used as a standard metrology technique for assessment of Line Edge and Line Width roughness. In this work we present an assessment of Optical Metrology and its ability to model roughness from a set of structures with intentional jogs to simulate both Line edge and Line width roughness at multiple amplitudes and frequencies. We also present multiple models to represent roughness and extract relevant parameters from Optical metrology. Another critical aspect of optical metrology setup is correlation of measurement to a complementary technique to calibrate models. In this work, we also present comparison of roughness parameters extracted and measured with variation of image processing conditions on a commercially available CD-SEM tool.

Paper Details

Date Published: 28 March 2017
PDF: 11 pages
Proc. SPIE 10145, Metrology, Inspection, and Process Control for Microlithography XXXI, 1014511 (28 March 2017); doi: 10.1117/12.2258196
Show Author Affiliations
Ravi Bonam, IBM Corp. (United States)
Raja Muthinti, IBM Corp. (United States)
Mary Breton, IBM Corp. (United States)
Chi-Chun Liu, IBM Corp. (United States)
Stuart Sieg, IBM Corp. (United States)
Indira Seshadri, IBM Corp. (United States)
Nicole Saulnier, IBM Corp. (United States)
Jeffrey Shearer, IBM Corp. (United States)
Raghuveer Patlolla, IBM Corp. (United States)
Huai Huang, IBM Corp. (United States)

Published in SPIE Proceedings Vol. 10145:
Metrology, Inspection, and Process Control for Microlithography XXXI
Martha I. Sanchez, Editor(s)

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