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Proceedings Paper

The opportunity and challenge of spin coat based nanoimprint lithography
Author(s): Wooyung Jung; Jungbin Cho; Eunhyuk Choi; Yonghyun Lim; Cheolkyu Bok; Masatoshi Tsuji; Kei Kobayashi; Takuya Kono; Tetsuro Nakasugi
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Paper Abstract

Since multi patterning with spacer was introduced in NAND flash memory1, multi patterning with spacer has been a promising solution to overcome the resolution limit. However, the increase in process cost of multi patterning with spacer must be a serious burden to device manufacturers as half pitch of patterns gets smaller.2, 3 Even though Nano Imprint Lithography (NIL) has been considered as one of strong candidates to avoid cost issue of multi patterning with spacer, there are still negative viewpoints; template damage induced from particles between template and wafer, overlay degradation induced from shear force between template and wafer, and throughput loss induced from dispensing and spreading resist droplet. Jet and Flash Imprint Lithography (J-FIL4, 5, 6) has contributed to throughput improvement, but still has these above problems. J-FIL consists of 5 steps; dispense of resist droplets on wafer, imprinting template on wafer, filling the gap between template and wafer with resist, UV curing, and separation of template from wafer. If dispensing resist droplets by inkjet is replaced with coating resist at spin coater, additional progress in NIL can be achieved. Template damage from particle can be suppressed by thick resist which is spin-coated at spin coater and covers most of particles on wafer, shear force between template and wafer can be minimized with thick resist, and finally additional throughput enhancement can be achieved by skipping dispense of resist droplets on wafer. On the other hand, spin-coat-based NIL has side effect such as pattern collapse which comes from high separation energy of resist. It is expected that pattern collapse can be improved by the development of resist with low separation energy.

Paper Details

Date Published: 21 March 2017
PDF: 8 pages
Proc. SPIE 10144, Emerging Patterning Technologies, 1014412 (21 March 2017); doi: 10.1117/12.2257845
Show Author Affiliations
Wooyung Jung, SK Hynix, Inc. (Korea, Republic of)
Jungbin Cho, SK Hynix, Inc. (Korea, Republic of)
Eunhyuk Choi, SK Hynix, Inc. (Korea, Republic of)
Yonghyun Lim, SK Hynix, Inc. (Korea, Republic of)
Cheolkyu Bok, SK Hynix, Inc. (Korea, Republic of)
Masatoshi Tsuji, Toshiba Corp. (Japan)
Kei Kobayashi, Toshiba Corp. (Japan)
Takuya Kono, Toshiba Corp. (Japan)
Tetsuro Nakasugi, Toshiba Corp. (Japan)

Published in SPIE Proceedings Vol. 10144:
Emerging Patterning Technologies
Christopher Bencher, Editor(s)

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