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Proceedings Paper

PAM4 silicon photonic microring resonator-based transceiver circuits
Author(s): Samuel Palermo; Kunzhi Yu; Ashkan Roshan-Zamir; Binhao Wang; Cheng Li; M. Ashkan Seyedi; Marco Fiorentino; Raymond Beausoleil
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Paper Abstract

Increased data rates have motivated the investigation of advanced modulation schemes, such as four-level pulseamplitude modulation (PAM4), in optical interconnect systems in order to enable longer transmission distances and operation with reduced circuit bandwidth relative to non-return-to-zero (NRZ) modulation. Employing this modulation scheme in interconnect architectures based on high-Q silicon photonic microring resonator devices, which occupy small area and allow for inherent wavelength-division multiplexing (WDM), offers a promising solution to address the dramatic increase in datacenter and high-performance computing system I/O bandwidth demands. Two ring modulator device structures are proposed for PAM4 modulation, including a single phase shifter segment device driven with a multi-level PAM4 transmitter and a two-segment device driven by two simple NRZ (MSB/LSB) transmitters. Transmitter circuits which utilize segmented pulsed-cascode high swing output stages are presented for both device structures. Output stage segmentation is utilized in the single-segment device design for PAM4 voltage level control, while in the two-segment design it is used for both independent MSB/LSB voltage levels and impedance control for output eye skew compensation. The 65nm CMOS transmitters supply a 4.4Vppd output swing for 40Gb/s operation when driving depletion-mode microring modulators implemented in a 130nm SOI process, with the single- and two-segment designs achieving 3.04 and 4.38mW/Gb/s, respectively. A PAM4 optical receiver front-end is also described which employs a large input-stage feedback resistor transimpedance amplifier (TIA) cascaded with an adaptively-tuned continuous-time linear equalizer (CTLE) for improved sensitivity. Receiver linearity, critical in PAM4 systems, is achieved with a peak-detector-based automatic gain control (AGC) loop.

Paper Details

Date Published: 20 February 2017
PDF: 7 pages
Proc. SPIE 10109, Optical Interconnects XVII, 101090F (20 February 2017); doi: 10.1117/12.2253310
Show Author Affiliations
Samuel Palermo, Texas A&M Univ. (United States)
Kunzhi Yu, Texas A&M Univ. (United States)
Ashkan Roshan-Zamir, Texas A&M Univ. (United States)
Binhao Wang, Hewlett-Packard Enterprise (United States)
Cheng Li, Hewlett-Packard Enterprise (United States)
M. Ashkan Seyedi, Hewlett-Packard Enterprise (United States)
Marco Fiorentino, Hewlett-Packard Enterprise (United States)
Raymond Beausoleil, Hewlett-Packard Enterprise (United States)

Published in SPIE Proceedings Vol. 10109:
Optical Interconnects XVII
Henning Schröder; Ray T. Chen, Editor(s)

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