The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

Date Published: 20 February 2017
PDF: 8 pages
Proc. SPIE 10107, Smart Photonic and Optoelectronic Integrated Circuits XIX, 101070Y (20 February 2017); doi: 10.1117/12.2252030

Published in SPIE Proceedings Vol. 10107:
Smart Photonic and Optoelectronic Integrated Circuits XIX
Louay A. Eldada; El-Hang Lee; Sailing He, Editor(s)