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Proceedings Paper

A 256×256 low-light-level CMOS imaging sensor with digital CDS
Author(s): Mei Zou; Nan Chen; Shengyou Zhong; Zhengfen Li; Jicun Zhang; Li-bin Yao
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Paper Abstract

In order to achieve high sensitivity for low-light-level CMOS image sensors (CIS), a capacitive transimpedance amplifier (CTIA) pixel circuit with a small integration capacitor is used. As the pixel and the column area are highly constrained, it is difficult to achieve analog correlated double sampling (CDS) to remove the noise for low-light-level CIS. So a digital CDS is adopted, which realizes the subtraction algorithm between the reset signal and pixel signal off-chip. The pixel reset noise and part of the column fixed-pattern noise (FPN) can be greatly reduced. A 256×256 CIS with CTIA array and digital CDS is implemented in the 0.35μm CMOS technology. The chip size is 7.7mm×6.75mm, and the pixel size is 15μm×15μm with a fill factor of 20.6%. The measured pixel noise is 24LSB with digital CDS in RMS value at dark condition, which shows 7.8× reduction compared to the image sensor without digital CDS. Running at 7fps, this low-light-level CIS can capture recognizable images with the illumination down to 0.1lux.

Paper Details

Date Published: 19 October 2016
PDF: 6 pages
Proc. SPIE 10155, Optical Measurement Technology and Instrumentation, 101552T (19 October 2016); doi: 10.1117/12.2247213
Show Author Affiliations
Mei Zou, Kunming Institute of Physics (China)
Nan Chen, Kunming Institute of Physics (China)
Shengyou Zhong, Kunming Institute of Physics (China)
Zhengfen Li, Kunming Institute of Physics (China)
Jicun Zhang, Kunming Institute of Physics (China)
Li-bin Yao, Kunming Institute of Physics (China)

Published in SPIE Proceedings Vol. 10155:
Optical Measurement Technology and Instrumentation
Sen Han; JiuBin Tan, Editor(s)

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