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Proceedings Paper

Using interleaved memory to implement network subsystems buffers
Author(s): Eyas Al-hajery; Salim A. Hariri
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Paper Abstract

The recent advances in computer communication technologies have led to the proliferation of new high-speed networks that operate in the Gpbs ranges. The existing implementations of standard communication protocol suites do not properly utilize the performance of these networks. This has intensified the efforts to develop high-performance network subsystems that are capable of utilizing the bandwidth offered by the high-speed networks. In this paper, we introduce a novel approach to implement the buffers of the network subsystems, which is based on memory interleaving concept. Using this approach, the results obtained using simulations show that data copying overhead is reduced, which increases the throughput of the network subsystem. Many of the proposed techniques to improve the performance of the network subsystems are based on parallel processing techniques. However, we show that for bulk data transfer, the interleaved memory network subsystem provides a comparable performance result at a lower cost.

Paper Details

Date Published: 1 October 1995
PDF: 11 pages
Proc. SPIE 2608, Emerging High-Speed Local-Area Networks and Wide-Area Networks, (1 October 1995); doi: 10.1117/12.224200
Show Author Affiliations
Eyas Al-hajery, Syracuse Univ. (United States)
Salim A. Hariri, Syracuse Univ. (United States)

Published in SPIE Proceedings Vol. 2608:
Emerging High-Speed Local-Area Networks and Wide-Area Networks
Kadiresan Annamalai; Krishna Bala; C. Brendan S. Traw; Ronald P. Bianchini Jr., Editor(s)

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