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Proceedings Paper

Process window optimizer for pattern based defect prediction on 28nm metal layer
Author(s): P. Fanton; R. La Greca; V. Jain; C. Prentice; J.-G. Simiz; S. Hunsche; B. Le-Gratiet; L. Depre
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Paper Abstract

At the 28nm technology node and below, hot spot prediction and process window control across production wafers have become increasingly critical. We establish proof off concept for ASML’s holistic lithography hot spot detection and defect monitoring flow, process window optimizer (PPWO), for a 228nm metal layer process. We demonstrate prediction and verification of defect occurrence on wafer that arise from focus variations exceeding process window margins of device hotspots. We also estimate the improvement potential if design aware scanner control was applied.

Paper Details

Date Published: 8 March 2016
PDF: 10 pages
Proc. SPIE 9778, Metrology, Inspection, and Process Control for Microlithography XXX, 97782O (8 March 2016); doi: 10.1117/12.2220295
Show Author Affiliations
P. Fanton, STMicroelectronics (France)
R. La Greca, ASML SARL (France)
V. Jain, ASML US (United States)
C. Prentice, ASML SARL (France)
J.-G. Simiz, STMicroelectronics (France)
LaHC CNRS-UMR (France)
S. Hunsche, ASML US (United States)
B. Le-Gratiet, STMicroelectronics (France)
L. Depre, ASML SARL (France)

Published in SPIE Proceedings Vol. 9778:
Metrology, Inspection, and Process Control for Microlithography XXX
Martha I. Sanchez, Editor(s)

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