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Proceedings Paper

Optimization of self-aligned double patterning (SADP)-compliant layout designs using pattern matching for 10nm technology nodes and beyond
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Paper Abstract

A pattern-based methodology for optimizing Self-Aligned Double Patterning (SADP)-compliant layout designs is developed based on detecting cut-induced hotspot patterns and replacing them with pre-characterized fixing solutions. A pattern library with predetermined fixing solutions is built. A pattern-based engine searches for matching patterns in the layout designs. When a match is found, the engine opportunistically replaces the detected pattern with a pre-characterized fixing solution, preserving only the design rule check-clean replacements. The methodology is demonstrated on a 10nm routed block. A small library of fourteen patterns reduced the number of cut-induced design rule check violations by 100% and lithography hotspots by 23%.

Paper Details

Date Published: 16 March 2016
PDF: 9 pages
Proc. SPIE 9781, Design-Process-Technology Co-optimization for Manufacturability X, 97810B (16 March 2016); doi: 10.1117/12.2219358
Show Author Affiliations
Lynn T.-N. Wang, GLOBALFOUNDRIES Inc. (United States)
Uwe Paul Schroeder, GLOBALFOUNDRIES Inc. (United States)
Youngtag Woo, GLOBALFOUNDRIES Inc. (United States)
Jia Zeng, GLOBALFOUNDRIES Inc. (United States)
Sriram Madhavan, GLOBALFOUNDRIES Inc. (United States)
Luigi Capodieci, GLOBALFOUNDRIES Inc. (United States)

Published in SPIE Proceedings Vol. 9781:
Design-Process-Technology Co-optimization for Manufacturability X
Luigi Capodieci, Editor(s)

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