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Proceedings Paper

Validating IC early-failure simulation
Author(s): Mohamod S. Moosa; Kelvin F. Poole; Michael L. Grams
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Paper Abstract

Early failures are the dominant concern as integrated circuit technology matures into consistently producing systems of high reliability. These failures are attributed to the presence of randomly occurring defects in elementary objects (contacts, vias, metal runs, gate oxides, bonds etc.) that result in extrinsic rather than intrinsic (wearout-related) mortality. A model relating system failure to failure at the elementary objective level has been developed. Reliability is modeled as a function of circuit architecture, mask layout, material properties, life-test data, worst-case use-conditions and the processing environment. The effects of competing failure mechanisms and the presence of redundant sub-systems are accounted for. Hierarchy is exploited in the analysis, allowing large scale designs to be simulated. Experimental validation of the modeling of oxide leakage related failure, based on correlation between actual failures reported for a production integrated circuit and Monte Carlo simulations that incorporate wafer-level test results and process defect monitor data, is presented. The state of the art in IC reliability simulation is advanced in that a methodology that provides the capability to design-in reliability while accounting for early failures has been developed; applications include process qualification, design assessment and fabrication monitoring.

Paper Details

Date Published: 22 September 1995
PDF: 7 pages
Proc. SPIE 2635, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis, (22 September 1995); doi: 10.1117/12.221449
Show Author Affiliations
Mohamod S. Moosa, Clemson Univ. (United States)
Kelvin F. Poole, Clemson Univ. (United States)
Michael L. Grams, Advanced Micro Devices, Inc. (United States)

Published in SPIE Proceedings Vol. 2635:
Microelectronic Manufacturing Yield, Reliability, and Failure Analysis
Gopal Rao; Massimo Piccoli, Editor(s)

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