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Proceedings Paper

Negative bias-temperature instability study of silicon oxide and its impact on PMOS reliability
Author(s): Joseph Xie; Michael J. McBride; Jeff C. Haines
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Paper Abstract

In the ULSI era, 200 mm vertical furnaces are used to achieve better uniformity across the wafer and provide a smaller footprint in the clean room. The arrival of these new furnaces also brings new challenges to the diffusion area. One of them is the Negative Bias-Temperature Instability (NBTI) problem related to processing conditions during the growth of silicon dioxide. The symptom is a Flatband Voltage (Vfb) shift in the negative direction after negative bias temperature stress (this shift is in the opposite direction from a mobile ion caused Vfb shift). While NBTI has been known for many years, the exact cause and its impact upon the reliability of MOS transistors was not well understood. In this work, a set of systematic experiments varying the oxidation process conditions was performed. The focus of the experiments was on eliminating NBTI. It was observed that the wafer temperature and ambient during withdrawal from the furnace was the critical factor. Using the results of this study, the electrical field and temperature dependence of this problem are illustrated and an empirical model is established. Finally, the impact of this problem to PMOS device reliability is addressed and optimum processing conditions recommended.

Paper Details

Date Published: 22 September 1995
PDF: 6 pages
Proc. SPIE 2635, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis, (22 September 1995); doi: 10.1117/12.221436
Show Author Affiliations
Joseph Xie, Advanced Micro Devices, Inc. (United States)
Michael J. McBride, Advanced Micro Devices, Inc. (United States)
Jeff C. Haines, Advanced Micro Devices, Inc. (United States)

Published in SPIE Proceedings Vol. 2635:
Microelectronic Manufacturing Yield, Reliability, and Failure Analysis
Gopal Rao; Massimo Piccoli, Editor(s)

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