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Proceedings Paper

FFT on reconfigurable hardware
Author(s): Steven A. Guccione; Mario J. Gonzalez
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Paper Abstract

The fast Fourier transform algorithm is specified in a data parallel version of 'C'. This specification is used to produce a custom circuit suitable for use in a system based on reconfigurable logic. Performance estimates indicate that this approach is capable of producing the 2D Fourier transform of images at real time video rates.

Paper Details

Date Published: 19 September 1995
PDF: 12 pages
Proc. SPIE 2607, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, (19 September 1995); doi: 10.1117/12.221344
Show Author Affiliations
Steven A. Guccione, Univ. of Texas/Austin (United States)
Mario J. Gonzalez, Univ. of Texas/Austin (United States)


Published in SPIE Proceedings Vol. 2607:
Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing
John Schewel, Editor(s)

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