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Proceedings Paper

All-IP-Ethernet architecture for real-time sensor-fusion processing
Author(s): Kei Hiraki; Mary Inaba; Hiroshi Tezuka; Hisanobu Tomari; Kenichi Koizumi; Shuya Kondo
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Paper Abstract

Serendipter is a device that distinguishes and selects very rare particles and cells from huge amount of population. We are currently designing and constructing information processing system for a Serendipter. The information processing system for Serendipter is a kind of sensor-fusion system but with much more difficulties: To fulfill these requirements, we adopt All IP based architecture: All IP-Ethernet based data processing system consists of (1) sensor/detector directly output data as IP-Ethernet packet stream, (2) single Ethernet/TCP/IP streams by a L2 100Gbps Ethernet switch, (3) An FPGA board with 100Gbps Ethernet I/F connected to the switch and a Xeon based server. Circuits in the FPGA include 100Gbps Ethernet MAC, buffers and preprocessing, and real-time Deep learning circuits using multi-layer neural networks. Proposed All-IP architecture solves existing problem to construct large-scale sensor-fusion systems.

Paper Details

Date Published: 7 March 2016
PDF: 6 pages
Proc. SPIE 9720, High-Speed Biomedical Imaging and Spectroscopy: Toward Big Data Instrumentation and Management, 97200D (7 March 2016); doi: 10.1117/12.2212016
Show Author Affiliations
Kei Hiraki, The Univ. of Tokyo (Japan)
Mary Inaba, The Univ. of Tokyo (Japan)
Hiroshi Tezuka, The Univ. of Tokyo (Japan)
Hisanobu Tomari, The Univ. of Tokyo (Japan)
Kenichi Koizumi, The Univ. of Tokyo (Japan)
Shuya Kondo, The Univ. of Tokyo (Japan)

Published in SPIE Proceedings Vol. 9720:
High-Speed Biomedical Imaging and Spectroscopy: Toward Big Data Instrumentation and Management
Kevin K. Tsia; Keisuke Goda, Editor(s)

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