Share Email Print

Proceedings Paper

Comparative study of submicron gap filling and planarization techniques
Author(s): Adriana E. Hass Bar-Ilan; N. Gutmann
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

As submicron devices continue to shrink, causing increased aspect ratios, gap filling in intermetal dielectric (IMD) becomes more difficult. At the time, global planarization becomes essential to meet the depth of focus budget for photolithography. The paper compares different techniques: Plasma Enhanced-CVD (PECVD) TEOS dep-etch-dep, CVD ozone-TEOS (both subatmospheric and atmospheric), FlowfillTM (a novel CVD process that uses a silane and hydrogen peroxide chemistry). Gap filling, planarity (local and global) and device performance comparisons are presented. It is concluded that use of the FlowfillTM, as part of a layer called 'Advanced Planarization Layer' (APL), will save costly planarization steps, while maintaining sort yield and device performance.

Paper Details

Date Published: 15 September 1995
PDF: 12 pages
Proc. SPIE 2636, Microelectronic Device and Multilevel Interconnection Technology, (15 September 1995); doi: 10.1117/12.221142
Show Author Affiliations
Adriana E. Hass Bar-Ilan, Tower Semiconductor Ltd. (Israel)
N. Gutmann, Tower Semiconductor Ltd. (Israel)

Published in SPIE Proceedings Vol. 2636:
Microelectronic Device and Multilevel Interconnection Technology
Ih-Chin Chen; Girish A. Dixit; Trung Tri Doan; Nobuo Sasaki, Editor(s)

© SPIE. Terms of Use
Back to Top
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?