Share Email Print
cover

Proceedings Paper

Low-power LVDS for digital readout circuits
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

This paper presents a mixed-signal LVDS driver in 90 nm CMOS technology. The designed LVDS core is to be used as a data link between Infrared Focal Plane Array (IRFPA) detector end and microprocessor input. Parallel data from 220 pixels of IRFPA is serialized by LVDS driver and read out to microprocessor. It also offers a reduced power consumption rate, high data transmission speed and utilizes dense placement of devices for area efficiency. The entire output driver circuit including input buffer draws 5mA while the output swing is 500mV at power supply of 1.2V for data rate of 6.4Gbps.Total LVDS chip area is 0.79 mm2. Due to these features, the designed LVDS driver is suitable for purposes such as portable, high-speed imaging.

Paper Details

Date Published: 4 June 2015
PDF: 7 pages
Proc. SPIE 9451, Infrared Technology and Applications XLI, 94510Y (4 June 2015); doi: 10.1117/12.2177556
Show Author Affiliations
Melik Yazici, Sabanci Univ. (Turkey)
Huseyin Kayahan, Sabanci Univ. (Turkey)
Omer Ceylan, Sabanci Univ. (Turkey)
Atia Shafique, Sabanci Univ. (Turkey)
Yasar Gurbuz, Sabanci Univ. (Turkey)


Published in SPIE Proceedings Vol. 9451:
Infrared Technology and Applications XLI
Bjørn F. Andresen; Gabor F. Fulop; Charles M. Hanson; Paul R. Norton, Editor(s)

© SPIE. Terms of Use
Back to Top