Based on either a SOI wafer or a bulk-silicon wafer, we discuss silicon photonic devices and integrations for chip-level optical interconnects. We present the low-voltage silicon PICs on a SOI wafer, where Si modulators and Ge-on-Si photodetectors are monolithically-integrated for intra-chip or inter-chip interconnects over 40 Gb/s. For future chip-level integration, the 50 Gb/s small-sized depletion-type MZ modulator with the vertically-dipped PN-depletion-junction (VDJ) is also presented. We report vertical-illumination-type Ge photodetectors on bulk-silicon wafers, with high performances up to 50 Gb/s. We present the bulk-silicon platform for practical implementation of chip-level interconnects, and the performance of the photonic transceiver silicon chip.

Date Published: 3 April 2015
PDF: 7 pages
Proc. SPIE 9368, Optical Interconnects XV, 93680Z (3 April 2015); doi: 10.1117/12.2078493

Published in SPIE Proceedings Vol. 9368:
Optical Interconnects XV
Henning Schröder; Ray T. Chen, Editor(s)