Proceedings Paper
Real-time algorithm enabling high dynamic range imaging and high frame rate exploitation for custom CMOS image sensor system implemented by FPGA with co-processor| Format | Member Price | Non-Member Price |
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Paper Abstract
We present results from a prototype CMOS camera system implementing a multiple sampled pixel level algorithm (“Last
Sample Before Saturation”) in real-time to create High-Dynamic Range (HDR) images that approach the dynamic range
of CCDs. The system is built around a commercial 1280 × 1024 CMOS image sensor with 10-bits per pixel and up to 500
Hz full frame rate with higher frame rates available through windowing. We provide details of system architecture and
present images collected with the system.
Paper Details
Date Published: 27 February 2015
PDF: 12 pages
Proc. SPIE 9400, Real-Time Image and Video Processing 2015, 940004 (27 February 2015); doi: 10.1117/12.2077727
Published in SPIE Proceedings Vol. 9400:
Real-Time Image and Video Processing 2015
Nasser Kehtarnavaz; Matthias F. Carlsohn, Editor(s)
PDF: 12 pages
Proc. SPIE 9400, Real-Time Image and Video Processing 2015, 940004 (27 February 2015); doi: 10.1117/12.2077727
Show Author Affiliations
Blake C. Jacquot, The Aerospace Corp. (United States)
Nathan Johnson-Williams, The Aerospace Corp. (United States)
Published in SPIE Proceedings Vol. 9400:
Real-Time Image and Video Processing 2015
Nasser Kehtarnavaz; Matthias F. Carlsohn, Editor(s)
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