Through-silicon vias (TSV) are important for wafer level packaging (WLP) as they provide patterning holes through thick silicon dies to integrate and interconnect devices which are stacked in z-direction. For economic processing TSV fabrication primarily needs to be cost-effective including especially a high throughput. Furthermore, a lithography process for TSV has to be stable enough to allow patterning on pre-structured substrates with inhomogeneous topography. This can be addressed by an exposure process which offers a large depth of focus. We have developed a mask-aligner lithography process based on the use of a double-sided photomask to realize aerial images which meet these constraints.

Date Published: 13 March 2015
PDF: 6 pages
Proc. SPIE 9374, Advanced Fabrication Technologies for Micro/Nano Optics and Photonics VIII, 93740X (13 March 2015);

Published in SPIE Proceedings Vol. 9374:
Advanced Fabrication Technologies for Micro/Nano Optics and Photonics VIII
Georg von Freymann; Winston V. Schoenfeld; Raymond C. Rumpf; Henry Helvajian, Editor(s)