As one of the most significant parts in the development of the next generation infrared detection system, the infrared signal processing system requires the ability of real-time processing and high speed data transmission. A newly developed real-time signal processing system for infrared detecting based on the heterogeneous multiprocessor system on chip (MPSoC) is proposed in this paper. The device follows the architecture of Xilinx Zynq platform, integrating a feature rich dual-core ARM and Xilinx FPGA in a single chip, built on the 28nm high-k metal gate process technology. According to our design, the FPGA fabric portion retains all the programmable flexibility to drive the infrared detector and acquire data from ADC, with registers parallel operations to implement hardware acceleration. Furthermore, the FPGA fabric is connected to the ARM centered processor unit through multiple high performance interfaces, confirming high bandwidth communication and high speed data transmission between the two portions. Finally, the dual core ARM takes charge of the infrared signal processing system in general. One of the CPUs controls separate hardware modules and maintains the GUI for user interaction. The other responds to the dedicated system commands and external interrupts to update system parameters simultaneously. The integration of ARM and FPGA provides levels of performance that two-chip solutions cannot match due to their limited I/O bandwidth, loose coupling and power budgets. Experiments show that the architecture of heterogeneous MPSoC enhances the efficiency of memory controller and increases the speed of data transmission, approaching the theoretical value of the interfaces bandwidth.

Date Published: 19 February 2015
PDF: 10 pages
Proc. SPIE 9449, The International Conference on Photonics and Optical Engineering (icPOE 2014), 944924 (19 February 2015); doi: 10.1117/12.2075621

Published in SPIE Proceedings Vol. 9449:
The International Conference on Photonics and Optical Engineering (icPOE 2014)
Ailing Tian; Anand Asundi; Weiguo Liu; Chunmin Zhang, Editor(s)