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Proceedings Paper

Systematic data mining using a pattern database to accelerate yield ramp
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Paper Abstract

Pattern-based approaches to physical verification, such as DRC Plus, which use a library of patterns to identify problematic 2D configurations, have been proven to be effective in capturing the concept of manufacturability where traditional DRC fails. As the industry moves to advanced technology nodes, the manufacturing process window tightens and the number of patterns continues to rapidly increase. This increase in patterns brings about challenges in identifying, organizing, and carrying forward the learning of each pattern from test chip designs to first product and then to multiple product variants. This learning includes results from printability simulation, defect scans and physical failure analysis, which are important for accelerating yield ramp.

Using pattern classification technology and a relational database, GLOBALFOUNDRIES has constructed a pattern database (PDB) of more than one million potential yield detractor patterns. In PDB, 2D geometries are clustered based on similarity criteria, such as radius and edge tolerance. Each cluster is assigned a representative pattern and a unique identifier (ID). This ID is then used as a persistent reference for linking together information such as the failure mechanism of the patterns, the process condition where the pattern is likely to fail and the number of occurrences of the pattern in a design. Patterns and their associated information are used to populate DRC Plus pattern matching libraries for design-for-manufacturing (DFM) insertion into the design flow for auto-fixing and physical verification. Patterns are used in a production-ready yield learning methodology to identify and score critical hotspot patterns. Patterns are also used to select sites for process monitoring in the fab.

In this paper, we describe the design of PDB, the methodology for identifying and analyzing patterns across multiple design and technology cycles, and the use of PDB to accelerate manufacturing process learning. One such analysis tracks the life cycle of a pattern from the first time it appears as a potential yield detractor until it is either fixed in the manufacturing process or stops appearing in design due to DFM techniques such as DRC Plus. Another such analysis systematically aggregates the results of a pattern to highlight potential yield detractors for further manufacturing process improvement.

Paper Details

Date Published: 28 March 2014
PDF: 13 pages
Proc. SPIE 9053, Design-Process-Technology Co-optimization for Manufacturability VIII, 905306 (28 March 2014); doi: 10.1117/12.2047307
Show Author Affiliations
Edward Teoh, GLOBALFOUNDRIES Inc. (United States)
Vito Dai, GLOBALFOUNDRIES Inc. (United States)
Luigi Capodieci, GLOBALFOUNDRIES Inc. (United States)
Ya-Chieh Lai, Cadence Design Systems, Inc. (United States)
Frank Gennari, Cadence Design Systems, Inc. (United States)

Published in SPIE Proceedings Vol. 9053:
Design-Process-Technology Co-optimization for Manufacturability VIII
John L. Sturtevant; Luigi Capodieci, Editor(s)

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