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Proceedings Paper

Fabrication of ambipolar gate-all-around field-effect transistors using silicon nanobridge arrays
Author(s): Jin Yong Oh; Jong-Tae Park; M. Saif Islam
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Paper Abstract

Nanowire bridges have been almost dormant in a nanostructured device community due to the challenges in reproducible growth and device fabrication. In this work, we present simple methods for creating silicon nanobridge arrays with repeatability, and demonstrate integration of gate-all-around field-effect-transistors in the arrays. P-type silicon nanowires air-bridges were synthesized using gold nanoparticles via the VLS technique on the array of predefined silicon electrode-pairs, and then surrounding gates were formed on the suspended air-bridge nanowires. The nanowire air-bridge field-effect-transistors with the surrounding gate exhibited p-type accumulation-mode characteristics with a subthreshold swing of 187 mV/dec and an on/off current ratio of 1.6×106. Despite the surrounding gate that helps gate biases govern the channel, off current substantially increased as drain bias increases. This ambipolar current-voltage property was attributable to gate-induced-drain-leakage at the overlap of gate and drain electrodes and trap-assisted tunneling at the nanowire and electrode connection.

Paper Details

Date Published: 19 September 2013
PDF: 8 pages
Proc. SPIE 8820, Nanoepitaxy: Materials and Devices V, 882002 (19 September 2013); doi: 10.1117/12.2023900
Show Author Affiliations
Jin Yong Oh, Univ. of California, Davis (United States)
Jong-Tae Park, Univ. of Incheon (Korea, Republic of)
M. Saif Islam, Univ. of California, Davis (United States)

Published in SPIE Proceedings Vol. 8820:
Nanoepitaxy: Materials and Devices V
Nobuhiko P. Kobayashi; A. Alec Talin; Albert V. Davydov; M. Saif Islam, Editor(s)

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