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Proceedings Paper

Efficient and decentralized data transfer architecture for component based embedded systems
Author(s): David de la Fuente; Jesús Barba; Julio Dondo; Fernando Rincón; María J. Santofimia; Juan Carlos López
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Paper Abstract

Multimedia embedded systems usually expose a chain-based architecture where each functional stage of the media algorithm is encapsulated in a media core in charge of processing the stream of data. Therefore, in this kind of systems, the interconnection mechanisms are key to cope with the enormous bandwidth demands. In this paper, we present a decentralized data transfer architecture for bus based embedded systems. The communication infrastructure introduced here is parameterizable, dynamically configurable and optimized for hardware media component processing platforms. Unlike conventional approaches, where a software control routine has to oversee all the steps of the data exchanging process (e.g. DMA configuration, trapping interruptions, ...), our approach moves such responsibility to the hardware components which are highly autonomous. This has a positive impact in performance since the processor is not mediating in every single data transfer that takes place in the system.

Paper Details

Date Published: 28 May 2013
PDF: 9 pages
Proc. SPIE 8764, VLSI Circuits and Systems VI, 87640K (28 May 2013); doi: 10.1117/12.2021272
Show Author Affiliations
David de la Fuente, Univ. de Castilla-La Mancha (Spain)
Jesús Barba, Univ. de Castilla-La Mancha (Spain)
Julio Dondo, Univ. de Castilla-La Mancha (Spain)
Fernando Rincón, Univ. de Castilla-La Mancha (Spain)
María J. Santofimia, Univ. de Castilla-La Mancha (Spain)
Juan Carlos López, Univ. de Castilla-La Mancha (Spain)

Published in SPIE Proceedings Vol. 8764:
VLSI Circuits and Systems VI
Teresa Riesgo; Massimo Conti, Editor(s)

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