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Proceedings Paper

State of the art direct digital frequency synthesis methodologies and their performance on FPGA
Author(s): Mariangela Genovese; Ettore Napoli
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Paper Abstract

The Direct Digital Frequency Synthesizer (DDFS) is a critical component routinely implemented in many electronic systems. Advanced DDFS design techniques have been proposed but they optimize the performance for a given ASIC (Application Specific Integrated Circuits) technology. Nowadays, FPGA are very often used for the release of electronic systems. As a consequence, the study of the performance of advanced DDFS design techniques when implemented on FPGA devices, is of great interest. The paper presents various implementation of state of the art DDFS on various FPGA and compares their performance providing hints on optimal design as a function of the chosen performance parameter.

Paper Details

Date Published: 28 May 2013
PDF: 10 pages
Proc. SPIE 8764, VLSI Circuits and Systems VI, 87640V (28 May 2013); doi: 10.1117/12.2017271
Show Author Affiliations
Mariangela Genovese, Univ. degli Studi di Napoli Federico II (Italy)
Ettore Napoli, Univ. degli Studi di Napoli Federico II (Italy)

Published in SPIE Proceedings Vol. 8764:
VLSI Circuits and Systems VI
Teresa Riesgo; Massimo Conti, Editor(s)

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