
Proceedings Paper
Optimal design of phase change random access memory based on 130nm CMOS technologyFormat | Member Price | Non-Member Price |
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Paper Abstract
An 8Mb phase change random access memory (PCRAM) has been developed by a 130nm 4-ML standard CMOS technology based on the Resistor-on-Via-stacked-Plug (RVP) storage cell structure. This phase change resistor is formed after CMOS logic fabrication. PCRAM can be embedded without changing any logic device and process. The memory cell selector is implemented by a standard 1.2V NMOS device. Aimed at the resistance distributions, lowering the operation current and improving the bit yield, some methods are used to optimize the design of the chip.
Paper Details
Date Published: 24 January 2013
PDF: 6 pages
Proc. SPIE 8782, 2012 International Workshop on Information Storage and Ninth International Symposium on Optical Storage, 87820F (24 January 2013); doi: 10.1117/12.2016907
Published in SPIE Proceedings Vol. 8782:
2012 International Workshop on Information Storage and Ninth International Symposium on Optical Storage
Fuxi Gan; Zhitang Song, Editor(s)
PDF: 6 pages
Proc. SPIE 8782, 2012 International Workshop on Information Storage and Ninth International Symposium on Optical Storage, 87820F (24 January 2013); doi: 10.1117/12.2016907
Show Author Affiliations
Daolin Cai, Shanghai Institute of Microsystem and Information Technology (China)
Univ. of Electronic Science and Technology of China (China)
Houpeng Chen, Shanghai Institute of Microsystem and Information Technology (China)
Qian Wang, Shanghai Institute of Microsystem and Information Technology (China)
Xiao Hong, Shanghai Institute of Microsystem and Information Technology (China)
Yifeng Chen, Shanghai Institute of Microsystem and Information Technology (China)
Univ. of Electronic Science and Technology of China (China)
Houpeng Chen, Shanghai Institute of Microsystem and Information Technology (China)
Qian Wang, Shanghai Institute of Microsystem and Information Technology (China)
Xiao Hong, Shanghai Institute of Microsystem and Information Technology (China)
Yifeng Chen, Shanghai Institute of Microsystem and Information Technology (China)
Linhai Xu, Shanghai Institute of Microsystem and Information Technology (China)
Xi Li, Shanghai Institute of Microsystem and Information Technology (China)
Zhaomin Wang, Shanghai Institute of Microsystem and Information Technology (China)
Yiyun Zhang, Shanghai Institute of Microsystem and Information Technology (China)
Zhitang Song, Shanghai Institute of Microsystem and Information Technology (China)
Xi Li, Shanghai Institute of Microsystem and Information Technology (China)
Zhaomin Wang, Shanghai Institute of Microsystem and Information Technology (China)
Yiyun Zhang, Shanghai Institute of Microsystem and Information Technology (China)
Zhitang Song, Shanghai Institute of Microsystem and Information Technology (China)
Published in SPIE Proceedings Vol. 8782:
2012 International Workshop on Information Storage and Ninth International Symposium on Optical Storage
Fuxi Gan; Zhitang Song, Editor(s)
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