As present CMOS devices approach technological and physical limits at the sub-10 nm scale, a ‘beyond CMOS’ information-processing technology is necessary for timescales beyond the semiconductor technology roadmap. This requires new approaches to logic and memory devices, and to associated lithographic processes. At the sub-5 nm scale, a technology platform based on a combination of high-resolution scanning probe lithography (SPL) and nano-imprint lithography (NIL) is regarded as a promising candidate for both resolution and high throughput production. The practical application of quantum-effect devices, such as room temperature single-electron and quantum-dot devices, then becomes feasible. This paper considers lithographic and device approaches to such a ‘single nanometer manufacturing’ technology. We consider the application of scanning probes, capable of imaging, probing of material properties and lithography at the single nanometer scale. Modified scanning probes are used to pattern molecular glass based resist materials, where the small particle size (<1 nm) and mono-disperse nature leads to more uniform and smaller lithographic pixel size. We also review the current status of single-electron and quantum dot devices capable of room-temperature operation, and discuss the requirements for these devices with regards to practical application.

Date Published: 26 March 2013
PDF: 12 pages
Proc. SPIE 8680, Alternative Lithographic Technologies V, 868017 (26 March 2013); doi: 10.1117/12.2012199

Published in SPIE Proceedings Vol. 8680:
Alternative Lithographic Technologies V
William M. Tong, Editor(s)