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Proceedings Paper

Evaluation of cost-driven triple patterning lithography decomposition
Author(s): Haitong Tian; Hongbo Zhang; Qiang Ma; Martin D. F. Wong
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Paper Abstract

As the current 193nm ArF immersion lithography technology is approaching its bottleneck, multiple patterning techniques have to be introduced to fulfill the process requirements in the sub-20nm technology node. Among all different patterning techniques, triple patterning lithography (TPL) is one of the major options for 14 nm or 10 nm technology node, which has a substantial requirement on process control and cost control at the same time. Patterning decomposition is the key step for the success of TPL. In the conventional TPL lithography, a constant spacing distance dmin is used to determine whether two nearby features should be on the same mask. However, in reality, the no-print and the best-print scenarios can never be separated by a clear constant number. Indeed, the decomposition criteria is closed related to lithography printing parameters, pattern types, and geometry distances. The conventional spacing rule with a constant number is way too simple. In this paper, we re-evaluate the conventional minimum spacing rule and utilize a local pattern cost model to evaluate our previous optimal TPL algorithm. Given a user specified local pattern aware cost model, our algorithm can easily embed the model into our formulation and compute an optimal solution. This demonstrates the extendability and robustness of our previous TPL algorithm.

Paper Details

Date Published: 29 March 2013
PDF: 8 pages
Proc. SPIE 8684, Design for Manufacturability through Design-Process Integration VII, 868407 (29 March 2013); doi: 10.1117/12.2011670
Show Author Affiliations
Haitong Tian, The Univ. of Illinois at Urbana-Champaign (United States)
Hongbo Zhang, Synopsys, Inc. (United States)
Qiang Ma, Synopsys, Inc. (United States)
Martin D. F. Wong, The Univ. of Illinois at Urbana-Champaign (United States)

Published in SPIE Proceedings Vol. 8684:
Design for Manufacturability through Design-Process Integration VII
Mark E. Mason; John L. Sturtevant, Editor(s)

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