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Proceedings Paper

VLSI chip set for picture archiving and communication systems
Author(s): Olu Akiwumi-Assani; Imran Shah; Brian H. Johnson
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Paper Abstract

Two Application Specific Integrated Circuits (ASIC) have been developed for hierarchical representation and compression of medical images for Picture Archiving & Communication System (PACS) environments. Hierarchical image representation enables progressive transmission of images and provides an economic means of rapidly surveying several images simultaneously. Furthermore, it facilitates the adaptation of high resolution images to displays with lower resolution. Compression enables efficient use of storage media and transmission channel capacities. Together the chip set implements a loss-less transform coding system.The first device implements the S-Transform algorithm (a 2x2 pixel case of the Hadamard Transform) which creates a hierarchical representation of an image. The second device implements the Lempel-Ziv compression algorithm, an adaptive codec that maps variable length strings of characters to fixed length code words. Used in tandem the chip set achieves image processing rates of up to 7.5million pixels per second at a system clock rate of 10MHz, for 13 bit pixel digitization. Both chips are microprocessor programmable. Because of the limited modes of the algorithm the S-Transform chip implementation focused on efficient utilization of silicon area and high processing rate. On the other hand because of its potential use outside of imaging applications, the Lempel-Ziv codec focused on versatility and speed. We describe the architecture and features of each chip and the characteristics of a system designed around these devices.

Paper Details

Date Published: 1 July 1990
PDF: 11 pages
Proc. SPIE 1246, Parallel Architectures for Image Processing, (1 July 1990); doi: 10.1117/12.19566
Show Author Affiliations
Olu Akiwumi-Assani, North American Philips Corp. (United States)
Imran Shah, North American Philips Corp. (United States)
Brian H. Johnson, North American Philips Corp. (United States)

Published in SPIE Proceedings Vol. 1246:
Parallel Architectures for Image Processing
Joydeep Ghosh; Colin G. Harrison, Editor(s)

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