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Proceedings Paper

Faster approach to ASIC diagnosis: LPISEM
Author(s): Sharad Prasad; Upendra Brahme
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Paper Abstract

With growing complexity of VLSI designs and shrinking device geometries, diagnosis and characterization efforts require more powerful tools. To improve the yield, it is essential to be able to quickly locate failures. The `standard' way for analyzing device failures has been to locate the failing cell schematics, simulate all nodes of the cell and compare the results to mechanical probing measurements. This process can be very time consuming, cumbersome, and destructive to the device. In this paper we describe how LPISEM (LSI Logic's photoemission, ion-mill & e-beam system) addresses the ASIC diagnosis problems. The photon detection system in the LPISEM allows the designer to `zoom' into the leakage sites in the unit under test (UUT). The non-destructive nature of LPISEM allows the comparison of simulated versus measured results interactively and visual inspection of the area of the leakage site. In addition, a schematic driven navigational interface helps the user to locate and probe the suspected area as follows: (1) Use the photon detection system to locate the leakage site. (2) Display the leakage site area on the SEM window where it can be probed and visually inspected. (3) Highlight the node of interest on the layout window (Calma Database). This automatically locates the net. (4) The actual and simulated waveforms for the suspected node are displayed on the scope tool. (5) Focussed ion beam can be used to identify and verify failures. The LPISEM consists of the following components: a KLA-EMMI (emission microscope for multilayer inspection), a Schlumberger IDS5000+ E-Beam prober, LSI Logic's Concurrent modular design environment simulation and verification tools, and SEIKO SMI8300 ion miller and VLSI tester. The integration of these components provides unique and uniform interface for users.

Paper Details

Date Published: 14 September 1994
PDF: 7 pages
Proc. SPIE 2334, Microelectronics Manufacturability, Yield, and Reliability, (14 September 1994); doi: 10.1117/12.186759
Show Author Affiliations
Sharad Prasad, LSI Logic Corp. (United States)
Upendra Brahme, Intel Corp. (United States)

Published in SPIE Proceedings Vol. 2334:
Microelectronics Manufacturability, Yield, and Reliability
Barbara Vasquez; Hisao Kawasaki, Editor(s)

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