Share Email Print

Proceedings Paper

Lithographic performance at sub-300-nm design rules using a high-NA I-line stepper with optimized NA and (sigma) in conjunction with advanced PSM technology
Author(s): Barton A. Katz; Richard Rogoff; James Foster; William T. Rericha; J. Brett Rolfson; Richard D. Holscher; Craig B. Sager; Patrick Reynolds
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

There is growing consensus that 350 nm design rules will be accomplished using i-line lithography. Recent developments in i-line lithography have pushed NA and field size to acceptable levels for 64 MB DRAM manufacturing. Simpler PSM technologies may be used to augment performance in first generation 64 MB DRAM manufacturing. Depending on the topography requirements, it may be necessary to have more process latitude at critical line/space layers. I-line lithography, with conventional binary intensity masks (BIM) should provide adequate process latitude at 400 nm design rules. Incremental improvements in process latitude at feature sizes around this design rule can be obtained using attenuated phase PSM technology. This paper presents data on the implementation of BIM and various PSM technologies in conjunction with a variable NA, variable (sigma) i-line stepper. Optimization of NA and (sigma) have been performed using the various mask technologies to maximize process latitude at features sizes from 450 nm down to below 300 nm. Ultimately, a path is provided to achieve adequate lithographic performance for both first and second generation 64 MB DRAM manufacturing.

Paper Details

Date Published: 17 May 1994
PDF: 8 pages
Proc. SPIE 2197, Optical/Laser Microlithography VII, (17 May 1994); doi: 10.1117/12.175437
Show Author Affiliations
Barton A. Katz, ASM Lithography, Inc. (United States)
Richard Rogoff, ASM Lithography, Inc. (United States)
James Foster, ASM Lithography, Inc. (United States)
William T. Rericha, Micron Semiconductor, Inc. (United States)
J. Brett Rolfson, Micron Semiconductor, Inc. (United States)
Richard D. Holscher, Micron Semiconductor, Inc. (United States)
Craig B. Sager, Benchmark Technologies Inc. (United States)
Patrick Reynolds, Benchmark Technologies Inc. (United States)

Published in SPIE Proceedings Vol. 2197:
Optical/Laser Microlithography VII
Timothy A. Brunner, Editor(s)

© SPIE. Terms of Use
Back to Top
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?