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Proceedings Paper

Economical silicon-on-glass interconnection
Author(s): Phil P. Marcoux
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Paper Abstract

An economical silicon on glass interconnection technique has been developed. A specially packaged semiconductor is clamped directly to the interconnecting traces deposited on the glass of a glass display. The clamping mechanism is a mechanical clamp configured so that the force is applied uniformly around the perimeter of the integrated circuit. The packaging process involves the encapsulation of the semiconductor circuits using photoforming techniques. The photoforming process known as Micro SMT encapsulates the circuit so it is sufficiently ruggedized to withstand the force of the clamp without damaging the circuit. In its ruggedized state the circuit can be handled, tested, and interconnected. The process uses masking, etching, and metalization processes common to the existing semiconductor industry. This process has been used economically and reliably over the past size years for microwave semiconductor devices. The photo formed package is physically as small as the bare circuit or a flip-chip. Unlike the use of bare integrated circuits or a flip-chips, the Micro SMT package has peripherally arranged leads. This offers the advantages of easier alignment of the chip to the glass footprint; inspect ability and testability of the interconnections.

Paper Details

Date Published: 1 April 1994
PDF: 3 pages
Proc. SPIE 2174, Advanced Flat Panel Display Technologies, (1 April 1994); doi: 10.1117/12.172131
Show Author Affiliations
Phil P. Marcoux, Micro SMT, Inc. (United States)

Published in SPIE Proceedings Vol. 2174:
Advanced Flat Panel Display Technologies
Peter S. Friedman, Editor(s)

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