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Proceedings Paper

Interaction between photoresist pretreatment and high-aspect-ratio contact and via hole definition
Author(s): Kevin C. Brown; Linda J. Insalaco; Elina C. Szeto
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Paper Abstract

The relationship between photoresist treatment prior to etch and subsequent oxide sidewall hole profile is investigated. Etched features were examined immediately after resist pattern definition with post-expose bake, then after oven hard bake or deep UV photostabilization. It was observed that taper of the etched oxide profile depends on pre-treatment temperature. Etch chemistry influences the relative change in taper across a range of pre-treatment temperatures. `Bowing,' as well as reticulated or `burnt' resist is eliminated. Profile variation across the wafer is reduced with deep UV photostabilization. Microscopic etch uniformity (RIE lag) also depends on the interaction between resist pre-treatment and oxide etch chemistry.

Paper Details

Date Published: 15 September 1993
PDF: 13 pages
Proc. SPIE 2090, Multilevel Interconnection: Issues That Impact Competitiveness, (15 September 1993); doi: 10.1117/12.156531
Show Author Affiliations
Kevin C. Brown, National Semiconductor Corp. (United States)
Linda J. Insalaco, Fusion Semiconductor Systems (United States)
Elina C. Szeto, Lam Research Corp. (United States)

Published in SPIE Proceedings Vol. 2090:
Multilevel Interconnection: Issues That Impact Competitiveness
Hoang Huy Hoang; Ron Schutz; Joseph B. Bernstein; Barbara Vasquez, Editor(s)

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