
Proceedings Paper
Development of reliable multilayer metallization for submicron ULSI technologyFormat | Member Price | Non-Member Price |
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Paper Abstract
In this paper, various multilayer metallization schemes for 0.5 micrometers CMOS technology are studied. Experimental results show that multilayer interconnect consisting of AlCu on Ti/TiN barrier layer has superior electromigration resistance as compared to that deposited on single TiN film. The application of an advanced wafer-level reliability test enables us to investigate grain boundary diffusion controlled electromigration phenomenon. The microstructural properties of the metallizations are also characterized by x-ray diffraction and scanning electron microscope. The stress migration resistance is also studied using high temperature storage at 175 degree(s)C and thermal cycle treatment at 450 degree(s)C.
Paper Details
Date Published: 15 September 1993
PDF: 12 pages
Proc. SPIE 2090, Multilevel Interconnection: Issues That Impact Competitiveness, (15 September 1993); doi: 10.1117/12.156529
Published in SPIE Proceedings Vol. 2090:
Multilevel Interconnection: Issues That Impact Competitiveness
Hoang Huy Hoang; Ron Schutz; Joseph B. Bernstein; Barbara Vasquez, Editor(s)
PDF: 12 pages
Proc. SPIE 2090, Multilevel Interconnection: Issues That Impact Competitiveness, (15 September 1993); doi: 10.1117/12.156529
Show Author Affiliations
Arthur T. Kuo, LSI Logic Corp. (United States)
Ratan K. Choudhury, LSI Logic Corp. (United States)
Ratan K. Choudhury, LSI Logic Corp. (United States)
William Hata, LSI Logic Corp. (United States)
Published in SPIE Proceedings Vol. 2090:
Multilevel Interconnection: Issues That Impact Competitiveness
Hoang Huy Hoang; Ron Schutz; Joseph B. Bernstein; Barbara Vasquez, Editor(s)
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