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Proceedings Paper

Defect reduction in the resist apply area
Author(s): John G. Costigan; Thomas M. Wolf
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Paper Abstract

As device technology continues to push for larger scale integration defect reduction has become increasingly important for the manufacturability and reliability of ICs. In Bell Labs' Device Development Line, defect reduction in the resist apply area has been implemented through several means: (1) The development of reliable particle checks using a Surfscan 4500 as a process monitor involved solving wafer related problems as well as changes in our cleaning procedures which has reduced average number of particles/wafer. (2) Involvement in a Defect Reduction task force provided a method for electrically testing grid structures to determine statistical differences in possible sources of resist particles. This resulted in a process change which reduced the defect density tested at our first level of metallization. (3) The employment of a monochromatic light source provided a fast and efficient method of detecting cosmetic defects associated with the application of photoresist. This was particularly useful in the testing necessary to determine the root causes of these problems, and as a process monitor to insure the absence of these defects after their solutions were implemented. In this paper we will detail these sources of photoresist defects, and our solutions which helped to make state of the art technology manufacturable with improved reliability.

Paper Details

Date Published: 14 January 1993
PDF: 14 pages
Proc. SPIE 1802, Microelectronics Manufacturing and Reliability, (14 January 1993); doi: 10.1117/12.139362
Show Author Affiliations
John G. Costigan, AT&T Bell Labs. (United States)
Thomas M. Wolf, AT&T Bell Labs. (United States)

Published in SPIE Proceedings Vol. 1802:
Microelectronics Manufacturing and Reliability
Barbara Vasquez; Anant G. Sabnis; Kenneth P. MacWilliams; Jason C.S. Woo, Editor(s)

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