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Proceedings Paper

256(V) x 256(H) full-frame area-array image sensor with on-chip electronics
Author(s): Stephen J. Strunk; William D. Washkurak; Savvas G. Chamberlain; S. J. Hood
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Paper Abstract

- A 256 x 256 pixel full frame CCDimage sensor has been developed that incorporates on-chip d. c. bias generation and clocking. Using a small pixel pitch of 10 im (V) by 10 im (H) these features allow the array to be packaged into very small dimensions with a total pin count of seven pins. By virtue of the three phase architecture the full well storage capacity can be increased with surface channel operation maximizing resolution under conditions of low scene contrast. In addition a modified technique of surface recombination is used to provide blooming suppression. Together these features make it well suited for applications which require a high performance miniature sensor. I.

Paper Details

Date Published: 12 August 1992
PDF: 7 pages
Proc. SPIE 1656, High-Resolution Sensors and Hybrid Systems, (12 August 1992); doi: 10.1117/12.135932
Show Author Affiliations
Stephen J. Strunk, DALSA Corp. (Canada)
William D. Washkurak, DALSA Corp. (Canada)
Savvas G. Chamberlain, DALSA Corp. (Canada)
S. J. Hood, DALSA Corp. (Canada)

Published in SPIE Proceedings Vol. 1656:
High-Resolution Sensors and Hybrid Systems
Morley M. Blouke; Winchyi Chang; Laurence J. Thorpe; Rajinder P. Khosla, Editor(s)

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