We consider the implementation of high capacity Ho-Kashyap (HK) associative processors (APs) on non-ideal optical and analog VLSI systems. Processor non-idealities considered include quantization, non-uniform beam illumination, and nonlinear device characteristics. New training-out techniques to overcome these non-idealities are advanced. We obtain optimal performance in the presence of stochastic noise by proper selection of the processor parameter (sigma) _syn. We derive important results that allow us to a priori determine the optimal value of (sigma) _syn and the expected recall accuracy P'_c without having to simulate the specific processor. We present a new algorithm that allows us to achieve storage near the theoretical maximum capacity (2 N, where N is the dimensionality of the input vector) with excellent recall accuracy. Optical laboratory results are included. We achieved storage of 1.5 N with recall accuracy P'_c >= 95% with input noise of standard deviation (sigma) ₁ equals 0.02 present and with optical analog components with 5 bit input accuracy and 8 bit memory matrix accuracy. With higher accuracy analog VLSI components (10 bit input accuracy and 11 bit weight accuracy), we achieve storage of 1.75 N with P'_c equals 96.43%.

Date Published: 1 November 1992
PDF: 14 pages
Proc. SPIE 1826, Intelligent Robots and Computer Vision XI: Biological, Neural Net, and 3D Methods, (1 November 1992); doi: 10.1117/12.131589

Published in SPIE Proceedings Vol. 1826:
Intelligent Robots and Computer Vision XI: Biological, Neural Net, and 3D Methods
David P. Casasent, Editor(s)