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Proceedings Paper

NRL FLEX radar signal-processing architecture: an update
Author(s): James J. Alter; James B. Evins; Glen L. Popick; Russell A. Scott; J. P. Letellier
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Paper Abstract

The NRL FLEX processor architecture is designed for real-time radar signal processing and was described at last year's conference in the context of its original application, the Point Defense Demonstration Radar project at NRL. This paper describes the current status of the processor and the application of the same architecture to a new problem which requires a different board configuration to satisfy a different set of latency and data flow requirements.

Paper Details

Date Published: 30 November 1992
PDF: 5 pages
Proc. SPIE 1770, Advanced Signal Processing Algorithms, Architectures, and Implementations III, (30 November 1992); doi: 10.1117/12.130926
Show Author Affiliations
James J. Alter, Naval Research Lab. (United States)
James B. Evins, Naval Research Lab. (United States)
Glen L. Popick, Naval Research Lab. (United States)
Russell A. Scott, Naval Research Lab. (United States)
J. P. Letellier, Naval Research Lab. (United States)

Published in SPIE Proceedings Vol. 1770:
Advanced Signal Processing Algorithms, Architectures, and Implementations III
Franklin T. Luk, Editor(s)

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