The field of silicon photonics continues to develop for an increasing number of application areas. Technology allowing the combination and miniaturization of optoelectronic and electronic devices in an integrated silicon platform is the key to providing affordable smart components for many different markets. Integration offers reduced component costs and size reduction in photonic networks, particularly for the emerging markets. Examples continue to appear of integrated systems and sub-systems, with the Data Center application leading the technology pull. Similarly, smart measurement and sensing systems using integrated optoelectronics could be miniaturized and made available at low cost, allowing wide deployment for medical, biological, and environmental screening applications. The need for optical interconnects on ULSI circuits is now an essential part of the roadmap for Si microelectronics.

As systems emerge, there is an increased focus on implementation, interfacing, and test. Consequently work is increasing on automated wafer scale testing systems, packaging, and passive alignment, all realized at low cost. Silicon is the ideal platform for integration of smart components. Large diameter, high quality silicon, and silicon-on-insulator (SOI) wafers are available at a relatively low cost and provide many chips per wafer, even for large area optoelectronic circuits. Furthermore, the move to 300mm wafers only exacerbates the need for high quality test and packaging in order to reach mass market applications. The maturity of Si process technology provides leverage for manufacture of optoelectronic components and provides many ways to integrate optoelectronic and electronic components on the same substrate. For optical interconnects, other important topics are the overall circuit architectures, the total power consumption, and the technology for optical wiring, couplers, modulators, emitters, and detectors, I/O, multiplexing and increasing levels of integration.

The emergence of the field of mid infra-red Silicon Photonics also opens many opportunities for this maturing technology to be applied into another buoyant application area, perhaps more naturally aligned with sensing applications.

This conference aims to provide an international forum for presenting the latest results and reviewing technologies relevant to the evolution of active and passive optoelectronic devices on Si and SOI platforms for all applications. Prospective authors are invited to submit original experimental and theoretical papers dealing with enabling technology for optoelectronic device integration on Si-based platforms.

Topics of particular interest are silicon photonics devices and systems based on: ;
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Conference OE203

Silicon Photonics XVIII

This conference has an open call for papers:
Abstract Due: 20 July 2022
Author Notification: 10 October 2022
Manuscript Due: 11 January 2023
The field of silicon photonics continues to develop for an increasing number of application areas. Technology allowing the combination and miniaturization of optoelectronic and electronic devices in an integrated silicon platform is the key to providing affordable smart components for many different markets. Integration offers reduced component costs and size reduction in photonic networks, particularly for the emerging markets. Examples continue to appear of integrated systems and sub-systems, with the Data Center application leading the technology pull. Similarly, smart measurement and sensing systems using integrated optoelectronics could be miniaturized and made available at low cost, allowing wide deployment for medical, biological, and environmental screening applications. The need for optical interconnects on ULSI circuits is now an essential part of the roadmap for Si microelectronics.

As systems emerge, there is an increased focus on implementation, interfacing, and test. Consequently work is increasing on automated wafer scale testing systems, packaging, and passive alignment, all realized at low cost. Silicon is the ideal platform for integration of smart components. Large diameter, high quality silicon, and silicon-on-insulator (SOI) wafers are available at a relatively low cost and provide many chips per wafer, even for large area optoelectronic circuits. Furthermore, the move to 300mm wafers only exacerbates the need for high quality test and packaging in order to reach mass market applications. The maturity of Si process technology provides leverage for manufacture of optoelectronic components and provides many ways to integrate optoelectronic and electronic components on the same substrate. For optical interconnects, other important topics are the overall circuit architectures, the total power consumption, and the technology for optical wiring, couplers, modulators, emitters, and detectors, I/O, multiplexing and increasing levels of integration.

The emergence of the field of mid infra-red Silicon Photonics also opens many opportunities for this maturing technology to be applied into another buoyant application area, perhaps more naturally aligned with sensing applications.

This conference aims to provide an international forum for presenting the latest results and reviewing technologies relevant to the evolution of active and passive optoelectronic devices on Si and SOI platforms for all applications. Prospective authors are invited to submit original experimental and theoretical papers dealing with enabling technology for optoelectronic device integration on Si-based platforms.

Topics of particular interest are silicon photonics devices and systems based on:
  • monolithic integration in Si and group-IV alloys (electronic and photonic integrated circuits)
  • hybrid integration (heterostructures, flip-chip bonding, and multi-chip modules on silicon)
  • optical interconnect technology for ULSI
  • wafer scale testing
  • packaging
  • optical I/O
  • towards high-volume manufacturing
  • systems and energy
  • cost models for Si Photonics
  • 300nm-technology implementation
  • low-power devices
  • LEDs
  • lasers
  • detectors
  • amplifiers
  • wavelength converters
  • mux/demux (rings, arrayed waveguide gratings, etc.)
  • modulators
  • interposers
  • passive alignment
  • switches
  • waveguides (SOI, SiO2/Si, SU-8, or sol-gel materials, including design innovation for high-index contrast Si-nanophotonic waveguide systems)
  • coupling
  • Si photonic crystals and micro-cavities
  • lab-on-a-chip
  • optoelectronic sensors on Si for measurement and screening in biological, clinical, genomics, proteomics, and environmental applications
  • micro-opto-electro-mechanical systems (MOEMS)
  • mid-infrared applications
  • quantum photonics
  • long-wavelength communications.
Conference Chair
Optoelectronics Research Ctr. (United Kingdom)
Conference Chair
McMaster Univ. (Canada)
Program Committee
Ctr. de Nanosciences et de Nanotechnologies (France)
Program Committee
Univ. of Southampton (United Kingdom)
Program Committee
Massachusetts Institute of Technology (United States)
Program Committee
Liam O'Faolain
Tyndall National Institute (Ireland)
Program Committee
Jason Ching Eng Png
A*STAR Institute of High Performance Computing (Singapore)
Program Committee
Hong Kong Univ. of Science and Technology (Hong Kong, China)
Program Committee
Intel Corp. (United States)
Program Committee
Queen's Univ. (Canada)
Program Committee
Univ. Gent (Belgium)
Program Committee
Ctr. de Nanosciences et de Nanotechnologies (France)
Program Committee
Jeremy Witzens
RWTH Aachen Univ. (Germany)
Program Committee
Carleton Univ. (Canada)
Program Committee
Univ. of Arkansas (United States)
Program Committee
Peking Univ. (China)
Program Committee
Rockley Photonics (United States)
Additional Information
What you will need to submit
  • Title
  • Author(s) information
  • Speaker biography
  • 250-word abstract for technical review
  • 100-word summary for the program
  • Keywords used in search for your paper (optional)
Note: Only original material should be submitted. Commercial papers, papers with no new research/development content, and papers with proprietary restrictions will not be accepted for presentation.