San Jose Convention Center
San Jose, California, United States
23 - 27 February 2020
Conference 11329
Advanced Etch Technology for Nanopatterning IX
Tuesday - Wednesday 25 - 26 February 2020
Conference
Committee
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Conference Chair
Conference Co-Chair
  • Catherine B. Labelle, Intel Corp. (United States)

Program Committee
  • Efrain Altamirano-Sánchez, IMEC (Belgium)
  • John Arnold, IBM Thomas J. Watson Research Ctr. (United States)
  • Keun Hee Bai, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
  • Julie Bannister, Tokyo Electron America, Inc. (United States)
  • Maxime Darnon, LN2 CNRS (Canada)
  • Sebastian U. Engelmann, IBM Thomas J. Watson Research Ctr. (United States)
  • Eric A. Hudson, Lam Research Corp. (United States)
  • Kaushik A. Kumar, Tokyo Electron Ltd. (Japan)

Program Committee continued...
Additional Conference
Information


Conference Chair
Richard Wise
Lam Research Corp.



Conference Co-Chair
Catherine Labelle
Intel Corp.
Tuesday 25 February Show All Abstracts
Session 1:
Keynote Session
Tuesday 25 February 2020
8:00 AM - 10:00 AM
Location: Convention Center, Room 211B
Session Chairs:
Catherine B. Labelle, Intel Corp. (United States) ;
Julie Bannister, Tokyo Electron America, Inc. (United States)
Etch and film co-optimization for high fidelity patterning (Keynote Presentation)
Paper 11329-1
Time: 8:00 AM - 8:40 AM
Author(s): Akiteru Ko, Tokyo Electron Ltd. (Japan)
Show Abstract
Precise etching profile control in high-aspect-ratio hole etching for 3D memory fabrication (Keynote Presentation)
Paper 11329-2
Time: 8:40 AM - 9:20 AM
Author(s): Mitsuhiro Omura, Toshiba Materials Co., Ltd. (Japan)
Show Abstract
CMOS scaling roadmap, Nanosheet FET, AI chips (Keynote Presentation)
Paper 11329-4
Time: 9:20 AM - 10:00 AM
Author(s): Huiming Bu, IBM Thomas J. Watson Research Ctr. (United States); Daniel J. Dechene, GLOBALFOUNDRIES Inc. (United States)
Show Abstract
Coffee Break 10:00 AM - 10:30 AM
Session 2:
Materials and Etch Integration
Tuesday 25 February 2020
10:30 AM - 12:10 PM
Location: Convention Center, Room 211B
Session Chairs:
Eric A. Hudson, Lam Research Corp. (United States) ;
Efrain Altamirano-Sánchez, imec (Belgium)
Novel etch technologies utilizing atomic layer process for advanced patterning (Invited Paper)
Paper 11329-5
Time: 10:30 AM - 11:00 AM
Author(s): Masanobu Honda, T. Katsunuma, Tokyo Electron Miyagi Ltd. (Japan); S. Kumakura, Tokyo Electron Ltd. (Japan); T. Hisamatsu, Y. Kihara, Tokyo Electron Miyagi Ltd. (Japan)
Show Abstract
Isotropic etch challenges for nanosheet device fabrication (Invited Paper)
Paper 11329-6
Time: 11:00 AM - 11:30 AM
Author(s): Yusuke Oniki, Efrain Altamirano-Sánchez, imec (Belgium)
Show Abstract
Materials engineering solutions to extend DRAM scaling
Paper 11329-7
Time: 11:30 AM - 11:50 AM
Author(s): Regina Freed, Applied Materials, Inc. (United States)
Show Abstract
Plasma process of Silicon Germanium alloy: molecular dynamics simulation study
Paper 11329-8
Time: 11:50 AM - 12:10 PM
Author(s): Hojin Kim, Yun Han, Mingmei Wang, Andrew Metz, Peter Biolsi, TEL Technology Ctr., America, LLC (United States)
Show Abstract
Lunch Break 12:10 PM - 1:40 PM
Session 3:
Computational Patterning and Patterning Process Control
Tuesday 25 February 2020
1:40 PM - 3:20 PM
Location: Convention Center, Room 211B
Session Chairs:
Yuyang Sun, Mentor, a Siemens Business (United States) ;
Qinghuang Lin, ASML US, Inc. (United States)
Reduction of Systematic Defects Through Machine Learning from Design to Fab (Invited Paper)
Paper 11329-9
Time: 1:40 PM - 2:10 PM
Author(s): James Word, Yuansheng Ma, Vlad Liubich, Le Hong, Liang Cao, Fan Jiang, Joerg Mellmann, Young-Chang Kim, Germain Fenger, Srividya Jayaram, Mentor, a Siemens Business (United States); Doohwan Kwak, Mentor (Korea, Republic of); Ananthan Raghunathan, Mentor (United States)
Show Abstract
Implementing effective process control strategies and reaping the benefits of data utilization (Invited Paper)
Paper 11329-10
Time: 2:10 PM - 2:40 PM
Author(s): Carlos Fonseca, Tokyo Electron America, Inc. (United States)
Show Abstract
Bayesian neural network modeling of SAQP
Paper 11329-11
Time: 2:40 PM - 3:00 PM
Author(s): Scott Halle, IBM Thomas J. Watson Research Ctr. (United States); Max O. Bloomfield, Rensselaer Polytechnic Institute (United States); Derren Dunn, Allen H. Gabor, IBM Thomas J. Watson Research Ctr. (United States)
Show Abstract
Optimal etch recipe prediction for 3D NAND structures
Paper 11329-12
Time: 3:00 PM - 3:20 PM
Author(s): Leandro Medina, Kara Kearney, Bryan Sundahl, Meghali Chopra, Roger T. Bonnecaze, SandBox Semiconductor (United States)
Show Abstract
Coffee Break 3:20 PM - 3:50 PM
Session 4:
Atomic Layer Etching and Novel Plasma Techniques
Tuesday 25 February 2020
3:50 PM - 5:40 PM
Location: Convention Center, Room 211B
Session Chairs:
Keun Hee Bai, SAMSUNG Electronics Co., Ltd. (Korea, Republic of) ;
Jake O'Gorman, Hitachi High Technologies America, Inc. (United States)
High precision and low damage spacer etch (Invited Paper)
Paper 11329-13
Time: 3:50 PM - 4:20 PM
Author(s): Nicolas Possémé, CEA-LETI (France)
Show Abstract
Highly selective SiO2 etching over Si3N4 using a cyclic process with BCl3 and CF4 gas chemistries for multiple patterning (Invited Paper)
Paper 11329-14
Time: 4:20 PM - 4:50 PM
Author(s): Miyako Matsui, Hitachi, Ltd. (Japan); Kenichi Kuwahara, Hitachi High-Technologies Corp. (Japan)
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Thermal prefunctionalization of SiO2 and SiNx surfaces to influence the etch per cycle in atomic layer etching (Invited Paper)
Paper 11329-15
Time: 4:50 PM - 5:20 PM
Author(s): Sumit Agarwal, Colorado School of Mines (United States)
Show Abstract
Cycling of implantation step and remote plasma process step for nitride spacer etching applications
Paper 11329-16
Time: 5:20 PM - 5:40 PM
Author(s): Camille Petit-Etienne, Vincent Renaud, Lab. des Technologies de La Microélectronique (France); Cécile Jenny, STMicroelectronics S.A. (France); Erwine Pargon, Lab. des Technologies de La Microélectronique (France)
Show Abstract
Wednesday 26 February Show All Abstracts
Session 5:
EUV Patterning and Etch: Joint session with conferences 11323 and 11329
Wednesday 26 February 2020
8:00 AM - 9:40 AM
Location: Convention Center, Grand Ballroom 220A
Session Chairs:
Yuyang Sun, Mentor, a Siemens Business (United States) ;
John Arnold, IBM Thomas J. Watson Research Ctr. (United States) ;
Allen H. Gabor, IBM Thomas J. Watson Research Ctr. (United States)
0.33 NA EUV systems for high-volume manufacturing
Paper 11323-91
Time: 8:00 AM - 8:20 AM
Author(s): Ron f. Schuurhuis, ASML (Netherlands); Marcel Mastenbroek, Frank Bornebroek, Roel Moors, Geert Fisser, Payam Tayebati, Roderik Van Es, ASML Netherlands B.V. (Netherlands)
Show Abstract
Extending EUV lithography for DRAM applications
Paper 11323-25
Time: 8:20 AM - 8:40 AM
Author(s): Gijsbert Rispens, Claire Van Lare, Dorothe Oorschot, Rik Hoefnagels, Shih-Hsiang Liu, Willem Van Mierlo, Ziyang Wang, Mark John Maslow, Jo Finders, ASML Netherlands B.V. (Netherlands); Roberto Fallica, Andreas Frommhold, Eric Hendrickx, imec (Belgium); Ardavan Niroomand, Scott Light, Micron Technology, Inc. (United States)
Show Abstract
Strategies for aggressive scaling of EUV multipatterning to sub-20 nm features
Paper 11323-26
Time: 8:40 AM - 9:00 AM
Author(s): Ashim Dutta, Jennifer Church, Joe Lee, Brendan O’Brien, Luciana Meli, Chi-Chun Liu, Saumya Sharma, Karen Petrillo, Cody J. Murray, IBM Corp. (United States); Eric Liu, Katie Lutker-Lee, Chia-Yun Hsieh, Qiaowei Lou, Jake Kaminsky, Stephanie Oyola-Reynoso, Subhadeep Kal, David O’Meara, Akiteru Ko, Aelan Mosden, Angélique Raley, Lior Huli, Dave Hetzer, Naoki Shibat, Robert Brandt, TEL Technology Ctr., America, LLC (United States)
Show Abstract
Simulation of photoresist defect transfer through subsequent patterning processes
Paper 11329-18
Time: 9:00 AM - 9:20 AM
Author(s): Dominik Metzler, IBM Thomas J. Watson Research Ctr. (United States); Sagarika Mukesh, Karthik Yogendra, IBM Corp. (United States); Mohamed Oulmane, Synopsys Switzerland, LLC (Switzerland); Phil Stopford, Lawrence Melvin, Synopsys, Inc. (United States)
Show Abstract
Low damage etching by Inductively Coupled Plasma (ICP) and Atomic Layer Etching (ALE) of III-V materials to enable next generation device performance
Paper 11329-17
Time: 9:20 AM - 9:40 AM
Author(s): Mark Dineen, Andy Goodyear, Stephanie Baclet, Mike Cooke, Oxford Instruments Plasma Technology Ltd. (United Kingdom); Craig Ward, Oxford Instruments Plasma Technology Ltd. (United States)
Show Abstract
A novel approach to high productivity EUV patterning
Paper 11329-38
Time: 9:40 AM - 10:00 AM
Author(s): Rich S. Wise, Lam Research Corp. (United States)
Show Abstract
Coffee Break 10:00 AM - 10:30 AM
Session 6:
Patterning Solutions for Emerging Applications
Wednesday 26 February 2020
10:30 AM - 12:10 PM
Location: Convention Center, Room 211B
Session Chairs:
Nihar Mohanty, Facebook Technologies, LLC (United States) ;
Ricardo Ruiz, Lawrence Berkeley National Lab. (United States)
Atomic Layer Etching of III-V materials to enable next generation device performance (Invited Paper)
(Canceled)
Paper 11329-20
Time: 10:30 AM - 11:00 AM
Author(s):
Show Abstract
Challenges for traditional and EUV Photomask etch (Invited Paper)
Paper 11329-21
Time: 11:00 AM - 11:30 AM
Author(s): Madhavi R. Chandrachood, Applied Materials, Inc. (United States)
Show Abstract
Fabrication and individual addressing of STT-MRAM bit array with 50 nm full pitch
Paper 11329-22
Time: 11:30 AM - 11:50 AM
Author(s): Lei Wan, HGST, Inc. (United States)
Show Abstract
Challenges in the patterning of RRAM devices for analog computing applications
Paper 11329-23
Time: 11:50 AM - 12:10 PM
Author(s): Iqbal Saraf, IBM Corp. (United States); Shyam Sridhar, Christopher Catano, Sergey Voronin, TEL Technology Ctr., America, LLC (United States); Dexin Kong, Soon-Cheon Seo, Youngseok Kim, Takashi Ando, Nicole Saulnier, Vijay Narayanan, IBM Thomas J. Watson Research Ctr. (United States)
Show Abstract
Lunch Break 12:10 PM - 1:40 PM
Session 7:
Advanced Patterning Integration
Wednesday 26 February 2020
1:40 PM - 4:00 PM
Location: Convention Center, Room 211B
Session Chair:
Ying Zhang, Applied Materials, Inc. (United States)
FEOL dry etch process challenges of ultimate FinFET scaling and next generation device architectures beyond N3 (Invited Paper)
Paper 11329-24
Time: 1:40 PM - 2:10 PM
Author(s): Zheng Tao, Liping Zhang, Emmanuel Dupuy, Boon Teik Chan, Efrain Altamirano-Sánchez, Frederic Lazzarino, imec (Belgium)
Show Abstract
Challenges and opportunities for optical neural network (Invited Paper)
Paper 11329-25
Time: 2:10 PM - 2:40 PM
Author(s): Arka Majumdar, Univ. of Washington (United States)
Show Abstract
Isotropic plasma free Si trim for FinFET to GAA device architectures
Paper 11329-26
Time: 2:40 PM - 3:00 PM
Author(s): Subhadeep Kal, TEL Technology Ctr., America, LLC (United States); Yusuke Oniki, imec (Belgium); Cheryl Alix, TEL Technology Ctr., America, LLC (United States); Karine Kenis, Efrain Altamirano-Sánchez, Naoto Horiguchi, Frank Holsteyns, imec (Belgium); Yusuke Muraki, Daniel Chanemougame, Aelan Mosden, Kaushik Kumar, Peter Biolsi, Trace Hurd, TEL Technology Ctr., America, LLC (United States)
Show Abstract
The metal gate cut development
(Canceled)
Paper 11329-27
Time: 3:00 PM - 3:20 PM
Author(s):
Show Abstract
Hydrocarbon layer formation and removal studies on SiN films etched in Halogen / Hydrofluorocarbon plasmas
Paper 11329-28
Time: 3:20 PM - 3:40 PM
Author(s): Luxherta Buzi, IBM Corp. (United States); John M. Papalia, IBM Thomas J. Watson Research Ctr. (United States); Mahmoud M. Khojasteh, Hiroyuki Miyazoe, Marinus Hopstaken, Steve Molis, Robert L. Bruce, Sebastian U. Engelmann, IBM Corp. (United States)
Show Abstract
Improvement of self-aligned dual patterning using spin-on-carbon mandrel
Paper 11329-29
Time: 3:40 PM - 4:00 PM
Author(s): Caitlin Philippi, Sophie Thibaut, Andrew Metz, Akiteru Ko, Angélique Raley, Peter Biolsi, TEL Technology Ctr., America, LLC (United States)
Show Abstract
Holistic litho, films and etch for EUV DRAM storage node pad
Paper 11329-39
Time: 3:00 PM - 3:20 PM
Author(s): Cyrus E. Tabery, ASML US, Inc. (United States); Nader Shamma, Lam Research Corp. (United States); Nicola Kissoon, ASML (Netherlands); Mircea Dusa, Joost Bekaert, IMEC (Belgium); Rich S. Wise, Lam Research Corp. (United States); Patrick Jaenen, IMEC (Belgium)
Show Abstract
Poster Session
Wednesday 26 February 2020
5:30 PM - 7:30 PM
Location: Convention Center, Hall 2

All symposium attendees – You are invited to attend the evening Poster Session to view the high-quality posters and engage the authors in discussion. Enjoy light refreshments while networking with colleagues in your field. Authors may set up their posters between 10:00 am and 5:00 pm the day of their poster session. Attendees are required to wear their conference registration badges to access the poster session.

Posters that are not set up by the 5:00 pm cut-off time will be considered no-shows, and their manuscripts may not be published. Poster authors should accompany their posters from 5:30 to 7:30 pm to answer questions from attendees. All posters and other materials must be removed no later than 7:45 pm. Any posters or materials left behind at the close of the poster session will be considered unwanted and will be discarded. SPIE assumes no responsibility for posters left up after the end of each poster session.
Cleaning chamber walls after ITO plasma etching process
Paper 11329-30
Time: 5:30 PM - 7:30 PM
Author(s): Salma Younesy, STMicroelectronics S.A. (France); Camille Petit-Etienne, Lab. des Technologies de La Microélectronique (France); Sébastien Barnola, CEA-LETI (France); Pascal Gouraud, STMicroelectronics S.A. (France); Gilles Cunge, Lab. des Technologies de La Microélectronique (France)
Show Abstract
Realization of high aspect ratio silicon nano-needles by using nano-lithographic Al mask
(Canceled)
Paper 11329-31
Time: 5:30 PM - 7:30 PM
Author(s):
Show Abstract
Machine Learning assistant technology to facilitate Fin and 3D memory measurements on SEM and TEM images
Paper 11329-32
Time: 5:30 PM - 7:30 PM
Author(s): Sergio Martinez, Julien Baderot, Guilhem Bernard, Alexandre Derville, Johann Foucher, POLLEN Metrology (France)
Show Abstract
Model-based process optimization for high aspect ratio trench etch with cyclic etching
(Canceled)
Paper 11329-33
Time: 5:30 PM - 7:30 PM
Author(s):
Show Abstract
Accelerated optimization of multilayer trench etches using model-based experimental design
Paper 11329-34
Time: 5:30 PM - 7:30 PM
Author(s): Kara Kearney, Sonali Chopra, Xilan Zhu, Yang Ban, Roger T. Bonnecaze, Meghali Chopra, SandBox Semiconductor (United States)
Show Abstract
Intra-field etch induced overlay penalties
Paper 11329-35
Time: 5:30 PM - 7:30 PM
Author(s): Richard van Haren, Oktay Yildirim, Orion Mouraille, Leon van Dijk, ASML Netherlands B.V. (Netherlands); Kaushik Kumar, Yannick Feurprier, Tokyo Electron Ltd. (Japan); Jan Hermans, imec (Belgium)
Show Abstract
Effects of pulsed inductively coupled Cl2/Ar plasma for the etching of Si nanostructure
Paper 11329-36
Time: 5:30 PM - 7:30 PM
Author(s): Yeji Shin, Sungkyunkwan University (Korea, Republic of); Kyowun Kim, Heeju Kim, Jisoo Oh, Geunyoung Yeom, Sungkyunkwan Univ. (Korea, Republic of)
Show Abstract
Etch characteristics of Magnetic Tunnel Junction (MTJ) materials by reactive ion beam
Paper 11329-37
Time: 5:30 PM - 7:30 PM
Author(s): JU EUN KIM, Sungkyunkwan University (Korea, Republic of); Doo San Kim, You Jung Gill, Geun Young Yeom, Sungkyunkwan Univ. (Korea, Republic of)
Show Abstract
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