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A semi-custom ASIC implementation of an intelligent control algorithm for a reconfigurable data acquisition system

Author(s): Hai Phuong Le; Ronny Veljanovski; Aladin Zayegh; Jugdutt Singh; Aleksandar Stojcevski

Published: 28 February 2005; 9 pages; 90 papers;
DOI: 10.1117/12.582065

Paper Abstract

This paper presents the application specific integrated circuit (ASIC) implementation of an intelligent controller for a reconfigurable data acquisition (DAQ) system. The DAQ system is employed in a digital relay for power system protection application. The controller is the intelligence behind the reconfigurable architecture. It continuously monitors the voltages and currents to detect the appearance of an abnormal condition on the power transmission network. Then it will send signals to adjust DAQ system sampling speed and filter cut-off frequency for properly detecting the fault location and properly analysing the fault. A novel approach to determine the line impedance angle has been proposed. This approach eliminates the square-root and arc-tan operations to reduce the cost of the semi-custom ASIC implementation of the intelligent controller. Analysis revealed that the intelligent controller achieved a maximum operating frequency of 100MHz, with 10ns critical path delay. The controller core utilises an area of 1.9mm2.
This paper was published in SPIE Proceedings Vol. 5649
Smart Structures, Devices, and Systems II, Said F. Al-Sarawi, Editors, pp.492-500
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