Atsushi Hiraiwa received the B.S. degree in physics from Kyoto University, Kyoto, Japan (1973), M.S. degree in physics from the University of Tokyo, Tokyo, Japan (1975), and Ph.D. in engineering from Tohoku University, Miyagi, Japan (1996).
In 1975 he joined Hitachi, Ltd., Tokyo, Japan, and was a Visiting Research Associate at Max-Planck-Institute, Grenoble, France, during 1983. He was with Renesas Electronics Corp., Ibaraki, Japan from 2007 to 2010 and, at the same time, with Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan from 2007 to 2011. He is currently with Waseda University, Tokyo, Japan. He has long been carrying out research and development on fabrication of MOSFET gate dielectrics/ shallow junctions and characterization of their reliability. His current interest covers device variability, particularly LER/LWR-related issues, and wide-bandgap semiconductor devices.
He is a member of the Japan Society of Applied Physics.