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Micro/Nano Lithography

John Sturtevant: Challenges in modeling for the next technology node

Mentor Graphics looks for cost-effective technology solutions as lithography advances.

17 June 2013, SPIE Newsroom. DOI: 10.1117/2.3201306.03

John Sturtevant is the Director of RET Product Development in the Design to Silicon Division at Mentor Graphics Corp., where he and his team work on optical proximity correction (OPC) and related technologies for 28, 20, and 14 nm.

Prior to joining Mentor in 2003, John was manager of Lithography R&D at Integrated Device Technology. From 1995-2001 he worked at Motorola's Advanced Process Research and Development Laboratory, leading the team deploying alternating phase-shift mask technology in production. He also led the development of advanced process control software at Motorola. Sturtevant also worked on lithography process and materials development at IBM from 1990-1995. He holds a B.A. in chemistry from Carleton College and a Ph.D. in physical chemistry from the University of Texas. He is a past Chairman and Editor for the SPIE Conference on Advances in Photoresist Technology, and current Chairman of the SPIE Design and Process Integration Program Committee. In 2009, he was named a Fellow of SPIE. He has published over 100 technical papers and holds four patents.