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Micro/Nano Lithography

Kafai Lai: Exploring technology solutions with computational lithography

Next-generation lithography requires more sophisticated design tools, says the IBM veteran.

30 July 2013, SPIE Newsroom. DOI: 10.1117/2.3201307.05

Kafai Lai is Senior Scientist and Engineer for the Advanced Lithography Research & Development Department at IBM Semiconductor Research and Development Center (Hopewell Junction, NY). His nearly 20 years of optical lithography R&D have included influential work in dry, immersion, and EUV lithography, covering technology nodes from 250 nm down to 14 nm and early 10 nm exploartion. He has made extensive contributions in the area of developing and implementing various resolution enhancement techniques (RETs) and tool/process optimization.

He has also helped develop several widely adopted industrial standards for lithography tool and process characterization. He holds 24 U.S. patents.

Since 2005 he has served as co-chair of the annual SPIE conference in Optical Microlithography. He has also taught several short courses for SPIE, and served as a reviewer for the SPIE Journal of Micro/Nanolithography, MEMS, and MOEMS. He was named a Fellow of SPIE in 2013.

In addition, he has received serveral awards from IBM, including an Eminence and Excellence Award in 2011 and a top 10% most valuable patent disclosure award (2007 and 2009), and an IBM Research Division Technical Award (2009).