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Optoelectronics & Communications

Integrating the Metro

Building competitive components for metro networks will require integrating via silica-on-silicon, MEMES, and indium phosphide.

From oemagazine August 2001
31 August 2001, SPIE Newsroom. DOI: 10.1117/2.5200108.0006

As optical-device manufacturers are feeling the pressure to provide more bandwidth at economical price points, they are working around the clock to find a logical way to build optical exit ramps off the backbone networks and into the metro environment. Photonic integrated circuits (PICs) are emerging as the most effective way to fulfill the many requirements of metropolitan dense wavelength division multiplexing (DWDM).

Metro applications are governed by a different set of performance requirements than those of long-haul optical networks. A metropolitan area network (MAN) supplies wavelengths for service delivery instead of long-range signal transport. The signal travels over much shorter distances and must be able to deliver a wide variety of services such as broadcast TV, video on demand, telephony, and 100 Mb/s Ethernet data. As telecommunications applications continue to evolve to deliver these services, networks will require smaller and more cost-effective components, creating new parameters for the total cost of ownership.

Compared with long-haul applications, the MAN places a greater emphasis on cost of repairs, size of components, and electrical power dissipation. The sheer number of components necessary for metro applications will greatly outstrip the number required for long-haul applications, making scalable volume manufacturing an important consideration. With their inherent size reduction, the ability to capture functions that previously required several fiber-connected discrete components on one circuit, and scalable manufacturability, PICs offer a viable solution.

integration routes

The migration path to metro application PICs begins with integrated passive devices built using silica-on-silicon planar waveguides. Examples include devices such as splitters, taps, couplers, and arrayed waveguide grating (AWG) multiplexers/ demultiplexers integrated on a single substrate.

Figure 1. An example of a hybrid silica/MEMS device is this switch in which a MEMS actuator is flip-chip bonded to a silica-on-silicon waveguide.

The next step is combining switching capabilities with the passive functions mentioned above. Applications include switches integrated with taps for optical protection switching and AWGs integrated with switches for optical add-drop multiplexers (OADM). Although much effort has been devoted to thermo-optic switching technology that can be integrated with silica-on-silicon waveguides, this approach suffers from high electrical power dissipation that generates unwanted heat. A new and promising approach to providing such switching capability uses hybrid silica/micro-electro-mechanical systems (MEMS) technology, which can achieve low electrical power dissipation and fail-safe latching (see figure 1).

DWDM will not be feasible for metro applications until the cost per node drops to $100,000. Only when the costs reach $1,000 per node will DWDM be applicable to the residential marketplace. At best, this is still a decade away, using conventional technology. Hybrid silica/MEMS technology will speed up that time frame, making DWDM at the metro level possible within the next two years.

Hybrid silica/MEMS technology produces optical devices that provide scalable integration using common mass-production techniques that pack more functionality into a smaller size. Hybrid silica/MEMS technology does have some drawbacks. It requires about eight weeks for prototype development. There are hundreds of steps necessary when building up and etching away layers of material.

The next step in the evolutionary process is integrating active and passive devices on a single chip. Indium phosphide (InP) is already the industry front-runner for this application. With InP, manufacturers will be able to integrate different passive and active functions to create a truly integrated monolithic chipset. InP can provide device integration that includes light generation, detection, amplification, and high-speed modulation and switching, as well as passive splitting, combining, and routing. InP yields compact passive devices with small bending radii, enabling more devices to be integrated on the same substrate. Like semiconductor integrated circuits (ICs), the photonic devices are planar and can be fabricated onto InP semiconductor wafers. Integrated devices also mean that interconnections are much shorter. Other advantages of integrated devices in InP include improved signal-to-noise ratio, lower power, and reduced sensitivity to off-chip parasitic.

While the advantages of InP are obvious, there still are some limitations. Insertion loss tends to be high. Polarization-dependent loss is another potential disadvantage. Waveguides are much smaller than single-mode fibers creating a coupling issue, though Nanovation is researching an approach that will lead to a fiber-to-fiber coupling loss of 2 dB or less.

shifting the paradigm

As each of these technologies matures, optical component venders are likely to see demands for specific combinations of functions from their customers. Right now, optical systems are built using complicated proprietary configurations of discrete components and subsystems. In many cases, these subsystems are hand assembled and incorporate dozens of discrete components connected by a long tangle of optical fiber. The result is an entire rack of equipment that squanders precious space and includes numerous points of failure. PICs allow network designers to greatly reduce the size of some of these subsystems (see figure 2).

Figure 2. Photonic integrated circuits (right) can replace discrete analogs such as this set of 12 discrete 1 x 5 splitters (left). (NANOVATION)

Another migration path is from custom to standardized PICs. Even though each system is unique from one network equipment manufacturer to another, they all require the same basic functions, many of which occur in the same sequence. By definition, standardized PICs would provide fundamental building blocks that could be manufactured and incorporated into systems with near plug-and-play ease, compacting the functionality of an entire rack of equipment into a space no larger than a matchbox. The benefits include reduced design time, decreased manufacturing costs, and ultimately, very rapid deployment of optical applications within the metro environment.

Electronic component manufacturers were able to effectively define standardized integrated circuits that derived from the common elements of application-specific integrated circuits. Based on that history, it is logical to assume that optoelectronic component manufacturers will define a host of standardized PICs from the common elements of application-specific PICs.

Reaching that goal requires component manufacturers to develop a library of standard building blocks similar to those developed by the electronic manufacturers, which will drive PIC standards and serve as the fundamental tools for optical network systems designers. Nanovation, for example, is developing a standardized suite of design elements that can be combined in a variety of ways to develop PICs. Built with hybrid silica/MEMS, these elements include switch matrices, splitters, and couplers, AWGs, semiconductor optical amplifiers (SOAs), and photodetectors. Such scalable, recyclable product blueprints will reduce design cost and time to market, allowing equipment manufacturers to update existing product lines or bring new product lines to market with speed and reliability.

The march toward all-optical networking is moving at a dramatic pace, and demand for capacity shows no sign of waning. This means that optical applications at the metro level are virtually guaranteed. It's no surprise that the need to reduce optical system size, manufacturing costs, and reliability issues are propelling system developers toward larger scales of integration. The PIC has a growing economic and technological advantage. oe

Gary Bjorklund

Gary Bjorklund is chief technology officer and senior vice president of Nanovation Technologies, Evanston, IL.