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Micro/Nano Lithography

Etch transfer into silicon of patterns with a half-pitch of under 20nm

An etching process based on a three-layer stack achieves transfer into silicon of patterns with a depth of less than 5nm and a half-pitch of less than 20nm written by thermal scanning probe lithography.
22 February 2016, SPIE Newsroom. DOI: 10.1117/2.1201602.006307

Nanolithography is used to create nanometer-scale patterns in an imaging resist layer. These patterns are then transferred into a substrate by etching techniques and further processed to create state-of-the-art devices, which often provide optimum performance at the smallest achievable feature sizes. The resolution achievable with patterning methods such as electron beam lithography1 and scanning probe lithography2 typically increases for thinner resist layers. The highest resolution is often obtained when the thickness of the imaging resist is just a few nanometers. However, the limited thickness poses severe challenges for the subsequent use of the patterns, because a certain amount of material is required for further processing steps, such as the creation of metal lines via lift-off or etch transfer into the substrate. Therefore, a reliable procedure for transferring such patterns is critical.

Purchase SPIE Field Guide to Optical LithographyThermal scanning probe lithography (tSPL)3 has been developed over the past five years into a unique patterning method. It combines the imaging capabilities of scanning probe microscopy (SPM) with the direct removal of resist material by a heatable SPM tip. To employ tSPL, a resist is required that reacts sensitively to a heat stimulus by evaporating cleanly. The best-known resist material to date is polyphthalaldehyde (PPA),4, 5 which is a polymer that decomposes in a self-amplified manner into its monomer units at temperatures of about 150°C. In this resist material tSPL is capable of printing patterns with a half-pitch of about 10nm at a patterning depth of about 4nm.6

We employed a three-layer hard-mask process7,8 to transfer a high-resolution pattern of similar depth into a silicon substrate (see Figure 1). The pattern was written using tSPL into a 9nm-thick PPA resist layer to a depth of 4–6nm. We then transferred the pattern into a silicon dioxide (SiO2) membrane via two reactive ion etching (RIE) steps: thinning with oxygen/nitrogen and etching with fluoroform, exploiting the etch selectivity of PPA over SiO2 of 1:2. The critical layer within the stack was this SiO2 membrane, which was only 2–3nm thick. We deposited SiO2 onto an HM8006 carbon-rich transfer layer by electron beam evaporation. A layer of SiO2 was formed without detectable pinholes and was sufficiently stable to withstand an RIE step using oxygen for more than 7min: see Figure 1(e). This period was sufficient to transfer the pattern deep into the HM8006 layer at an etching rate of 19.5nm/min. We carried out the etch transfer into the HM8006 layer and subsequently into the substrate by RIE using oxygen and sulfur hexafluoride/perfluorocyclobutane, respectively. Details of the etch transfer process can be found in a previous article.7

Figure 1. Schematic diagram of the three-layer transfer process. (a) A pattern is printed by thermal scanning probe lithography (tSPL) 4–6nm deep into a 9nm-thick polyphthalaldehyde (PPA) resist. (b) Thinning is carried out by reactive ion etching (RIE) with oxygen/nitrogen to remove residual PPA. Subsequently, the pattern is transferred by RIE with fluoroform (CHF3) into a 2–3nm-thick silicon dioxide (SiO2) membrane. (c) RIE with oxygen is used to amplify the pattern into a 30–50nm-thick HM8006 layer. (d) The final transfer into silicon is performed using RIE with sulfur hexafluoride (SF6)/perfluorocyclobutane (C4F8). (e) Stability of the SiO2 membrane in oxygen plasma. (Adapted from a previous article.7)

Scanning electron micrographs (SEMs) of the transferred patterns are shown in Figure 2. We achieved transfer of patterns written with a half-pitch of 18.6nm. A cross-sectional SEM of lines with a half-pitch of 18.6nm transferred to a depth of 65nm into silicon is shown in the inset of Figure 2(b). The line edge roughness, defined as three standard deviations of the line edge, was determined by analysis of the SEMs to be 2.8nm. A comparison of the patterns transferred into the HM8006 layer and into the silicon substrate revealed that all the details of the lines were copied into the final pattern. This suggests that the roughness was already present in the SiO2 membrane and therefore originated from the patterning and initial etching steps. Once the pattern was defined in the SiO2 membrane, it could be accurately transferred into the substrate.

Figure 2. Results of the etch transfer process indicate the transfer of patterns with a half-pitch (HP) of 18.6nm into a 50nm-thick HM8006 layer (a) and 65nm deep into silicon (b). The inset shows a cross-sectional image obtained by scanning electron microscopy and prepared by deposition of platinum and cutting using a focused ion beam. (Adapted from a previous article.7)

In summary, we have shown that tSPL is capable of producing high-resolution patterns with a half-pitch of less than 20nm, which can be transferred into a selected substrate by etching techniques. For the transfer, we designed a three-layer stack for the optimal amplification of shallow high-resolution patterns. This transfer process can readily be adapted to other lithographic methods. The current focus of our work is on improving the fidelity of the patterns and reducing the line edge roughness to obtain resolutions with a half-pitch of less than 10nm.

The authors thank Ute Drechsler for the fabrication of cantilevers and assistance in the RIE etching steps, Meinrad Tschudy for the deposition of the silicon dioxide hard masks, Steffen Reidt for obtaining the cross-sectional images, and Felix Holzner and Philip Paul for valuable discussion. The work was partially supported by the European Commission FP7-ICT-2011 318804 and by the European Research Council StG 307079.

Armin Knoll, Colin Rawlings
IBM Research – Zurich
Rüschlikon, Switzerland
Heiko Wolf, Urs Duerig, Martin Spieser
SwissLitho AG
Zurich, Switzerland

Armin Knoll received a master's degree in experimental physics from the University of Würzburg, Germany, in 1998 and a PhD in physical chemistry from the University of Bayreuth, Germany, in 2004. He is leading research into probe-based nanofabrication at IBM Research – Zurich.

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