SPIE Membership Get updates from SPIE Newsroom
  • Newsroom Home
  • Astronomy
  • Biomedical Optics & Medical Imaging
  • Defense & Security
  • Electronic Imaging & Signal Processing
  • Illumination & Displays
  • Lasers & Sources
  • Micro/Nano Lithography
  • Nanotechnology
  • Optical Design & Engineering
  • Optoelectronics & Communications
  • Remote Sensing
  • Sensing & Measurement
  • Solar & Alternative Energy
  • Sign up for Newsroom E-Alerts
  • Information for:
SPIE Photonics West 2019 | Register Today

SPIE Defense + Commercial Sensing 2019 | Register Today

2019 SPIE Optics + Photonics | Call for Papers



Print PageEmail PageView PDF

Micro/Nano Lithography

Resist roughness plays a key role in pattern transfer

A simplified nanoscale etching model reveals how resist sidewall roughness is transferred to the substrate, and suggests simple rules of thumb.
29 March 2013, SPIE Newsroom. DOI: 10.1117/2.1201303.004738

Einstein is reported to have once said, “Everything should be made as simple as possible, but not simpler.” Maybe one ought to keep this quote in mind when coping with the increasing complexity of the physicochemical processes at work in the manufacture of modern integrated circuits, which is being driven by demand for smaller, faster, and cheaper electronic devices. Consider, for example, the nanoscale pattern transfer from a resist layer to its substrate (see Figure 1). Due to its abundance and its effects on the quality of the final circuit feature, it has attracted increased attention recently in double-patterning 193nm and extreme UV lithography, which are the two strong candidates for the fabrication of sub-20nm patterns in near-future electronic circuits.

Figure 1. Schematic of a two-layer stack with sidewall roughness (a) before and (b) after pattern transfer.

Pattern transfer is performed by an ionized gas called plasma: ions and neutral species are produced by an electrical discharge and etch the substrate where it is unprotected by a ‘resist.’ Pattern transfer from a resist to the substrate is a complex process involving a large number of interrelated factors. These include, for example, the local flux of plasma gas species (ions and neutral species) on the feature (e.g., line), their interactions with the resist and substrate material, the product redeposition, the shape of the resist profile, and its sidewall roughness (the so-called line edge roughness, LER). Understanding and controlling pattern transfer ideally requires taking all of these factors into account. But is this really necessary? Do all these factors contribute equally to the final outcome of the shape and the sidewall morphology of the printed features? Or, in the spirit of Einstein's quote, can appropriate simplifications be made and implemented in a modeling approach that can explain and predict experimental results?

The majority of published work focuses on the interactions of plasma species with resist material, assuming initially smooth resist sidewalls or unrealistic deterministic morphologies.1 In our work, we emphasize a realistic representation of the resist line's morphology (i.e., the slope of the line and its sidewall roughness) before plasma etching. However, we use a simple ion-driven model for etching.2–4

The sidewall roughness, according to recent advances in its metrology and characterization, exhibits fractal characteristics, and a three-parameter model can be successfully used for its characterization involving: the root-mean-square roughness, σ, quantifying the amplitude of sidewall fluctuations; the correlation length, ξ, characterizing the spatial extent of correlations; and the roughness exponent, α, measuring the relative contribution of high-frequency fluctuations to the total roughness.5

More specifically, our model assumes a simplified two-layer stack (resist and substrate)—see Figure 1—and implements two basic procedures. In the first procedure, a rough plane surface—see Figure 2(a)—is generated with predefined roughness parameters (σ, ξ, and α) and is superimposed onto a smooth 3D line: see Figure 2(b). The outcome is a synthesized 3D line with realistic roughness resembling a true resist line after lithography and before pattern transfer: see Figure 2(c). In the second procedure, pattern transfer is approximated with an anisotropic etching process, where the sidewalls of the underlying substrate are determined only by the shadowing of the (unidirectional) incident ions from the eroding protrusions of the initial resist sidewall and the resist etch selectivity: see Figure 2(d).4

Figure 2. (a) A plane with specific roughness parameters (root-mean-square roughness σ = 2, spatial extent of roughness ξ = 20, and roughness exponent α = 0.4). (b) A 3D smooth line. (c) A 3D rough line coming from the superimposition of the plane rough surface—Figure 1(a)—onto the smooth 3D line: see Figure 1(b). (d) The 3D line of the substrate after plasma etching and removal of resist. Notice the formation of striations at the sidewall of the substrate.

As with all models, their validation depends upon their predictive power when compared with experiments. Here, our simple model has shown remarkable success. First, it is evident from Figure 2(d) that the model reproduces the common experimental observation of curtain-like structures on the sidewalls after pattern transfer. Second, both experimental results6—Figure 3(a)—and modeling predictions—Figure 3(b)—exhibit a linear trend of the substrate 3σS versus resist 3σR with a slope tan ω ∼0.5 (R stands for resist and S for substrate). The linear relation occurs above a low LER limit 3σR*, revealing the beneficial role of pattern transfer for LER reduction at sufficiently large resist LER.

Figure 3. (a) Experimental6 and (b) modeling results for the substrate LER after pattern transfer (3σS)versus the resist LER before pattern transfer (3σR). The modeling results are taken for resist thickness 150nm, correlation length 30nm, roughness exponent 0.6, etching depth 150nm, and resist profile slope (θR) 84.7°. Notice the almost quantitative agreement of the model predictions and experimental measurements. tan ω: Slope of the linear trend.

Simple argument, inspired by our modeling, shows that σR*∼ξR/(ctan θR), with c∼2.0–2.5. Therefore, the proposed rule of thumb for reducing LER during pattern transfer is that the following inequality holds: (σRR) tan θR>1/c. The model also predicts that the reduction is favored for small ξR, αR, and large resist thickness.

Third, we consider the frequency spectrum of LER quantified by power spectral density (PSD, the square of Fourier transform amplitudes), which provides a more detailed characterization of sidewall morphology. Experimental results show that pattern transfer affects mainly the middle and high frequencies and less the low frequencies: see Figure 4(a) and (b).7,8 Figure 4(c) and (d) demonstrates that this is also captured by our simple model: at small σR, pattern transfer reduces the middle- and high-frequency part of the spectrum, while at higher σR, the low-frequency components are also affected.

Figure 4. Power spectral densities (PSD) of the resist LER before pattern transfer and the substrate LER after pattern transfer calculated from experimental measurements for two resists (a and b)7 and from the modeling results for two different resist LER σR(c and d). In the modeling results, the correlation length, the roughness exponent, the thickness, and the sidewall angle of the initial resist line were 30nm, 0.6, 150nm, and 86.2°, respectively. The etching selectivity was 3 and the etching depth was 150nm. Notice the qualitative capturing of the experimental behavior from modeling.

In conclusion, despite its simplicity, the model seems to predict the main experimental trends revealing the critical role of resist LER in the quality of pattern transfer, while it provides simple rules of thumb for making technological decisions. However, further simplifications by overlooking either the shadowing or the smoothing caused by the etching of the resist protrusions limit the predictive power of the modeling, bringing to mind the final words of Einstein's advice. Our next step is to make more detailed representations of the morphology of resist lines, including anisotropy, roundness, and footing. We are also investigating the limits of the model and considering the impact of more complicated plasma-resist interactions.

Vassilios Constantoudis, George Kokkoris, Evangelos Gogolides
Department of Microelectronics
National Center for Scientific Research (NCSR) Demokritos
Aghia Paraskevi, Greece

Vassilios Constantoudis is a physicist currently working at the Department of Microelectronics of NCSR Demokritos. His main research interest has been in the characterization, modeling, and application of roughness in microlithography and plasma nanopatterning. He is an author/co-author of 80 publications with more than 600 third-party citations.

George Kokkoris is a chemical engineer and research fellow. His main research interests are on the mechanisms of surface roughness formation and on multiscale modeling of plasma etching and chemical vapor deposition processes. He has authored/co-authored over 35 publications in peer-reviewed journals.

Evangelos Gogolides graduated in chemical engineering from the National Technical University of Athens, Greece, in 1985. He then obtained an MSc and a PhD from the Massachusetts Institute of Technology in 1987 and 1990, respectively. His thesis was on plasma processing and simulation, and his post-doctoral work on microlithography. He is a research professor, editor of Microelectronic Engineering, and a committee member for the International Conference on Micro- and Nano-Engineering. He has authored 180 publications and holds seven patents.

1. W. Guo, H. Sawin, Review of profile and roughening simulation in microelectronics plasma etching, J. Phys. D: Appl. Phys. 42, p. 194014, 2009. doi:10.1088/0022-3727/42/19/194014
2. G. Kokkoris, V. Constantoudis, E. Gogolides, Nanoscale roughness effects at the interface of lithography and plasma etching: modeling of line-edge-roughness transfer during plasma etching, IEEE Trans. Plasma Sci. 37(9), p. 1705-1714, 2009. doi:10.1109/TPS.2009.2024117
3. V. Constantoudis, G. Kokkoris, P. Xydi, G. P. Patsis, E. Gogolides, Modeling of line edge roughness transfer during plasma etching, Microelectron. Eng. 86, p. 968-970, 2009. doi:10.1016/j.mee.2009.01.040
4. G. Kokkoris, V. Constantoudis, E. Gogolides, 3D modeling of LER transfer from the resist to the underlying substrate: the effect of the resist roughness, Proc. SPIE 8328, p. 83280V, 2012. doi:10.1117/12.921692
5. V. Constantoudis, G. P. Patsis, L. H. A. Leunissen, E. Gogolides, Line edge roughness and critical dimension variation: fractal characterization and comparison using model functions, J. Vac. Sci. Technol. B 22(4), p. 1974-1983, 2004. doi:10.1116/1.1776561
6. A. R. Pawloski, A. Acheta, S. Bell, B. L. Fontaine, T. Wallow, H. J. Levinson, The transfer of photoresist LER through etch, Proc. SPIE 6153, p. 615318, 2006. doi:10.1117/12.652206
7. T. Wallow, A. Acheta, Y. Ma, A. Pawloski, S. Bell, B. Ward, C. Tabery, B. L. Fontaine, R.-H. Kim, S. McGowan, H. J. Levinson, Line edge roughness in 193nm resists: lithographic aspects and etch transfer, Proc. SPIE 6519, p. 651919, 2007. doi:10.1117/12.712319
8. P. Foubert, A. V. Pret, E. A. Sanchez, R. Gronheid, Impact of post-litho LWR smoothing processes on the post-etch patterning result, Proc. SPIE 7972, p. 797213, 2011. doi:10.1117/12.881433